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60 lines
2.3 KiB
C++
60 lines
2.3 KiB
C++
//===-- AArch64SelectionDAGInfo.cpp - AArch64 SelectionDAG Info -----------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the AArch64SelectionDAGInfo class.
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//
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//===----------------------------------------------------------------------===//
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#include "AArch64TargetMachine.h"
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using namespace llvm;
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#define DEBUG_TYPE "aarch64-selectiondag-info"
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SDValue AArch64SelectionDAGInfo::EmitTargetCodeForMemset(
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SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src,
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SDValue Size, unsigned Align, bool isVolatile,
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MachinePointerInfo DstPtrInfo) const {
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// Check to see if there is a specialized entry-point for memory zeroing.
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ConstantSDNode *V = dyn_cast<ConstantSDNode>(Src);
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ConstantSDNode *SizeValue = dyn_cast<ConstantSDNode>(Size);
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const AArch64Subtarget &STI =
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DAG.getMachineFunction().getSubtarget<AArch64Subtarget>();
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const char *bzeroName = (V && V->isNullValue())
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? DAG.getTargetLoweringInfo().getLibcallName(RTLIB::BZERO) : nullptr;
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// For small size (< 256), it is not beneficial to use bzero
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// instead of memset.
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if (bzeroName && (!SizeValue || SizeValue->getZExtValue() > 256)) {
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const AArch64TargetLowering &TLI = *STI.getTargetLowering();
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EVT IntPtr = TLI.getPointerTy(DAG.getDataLayout());
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Type *IntPtrTy = DAG.getDataLayout().getIntPtrType(*DAG.getContext());
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TargetLowering::ArgListTy Args;
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TargetLowering::ArgListEntry Entry;
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Entry.Node = Dst;
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Entry.Ty = IntPtrTy;
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Args.push_back(Entry);
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Entry.Node = Size;
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Args.push_back(Entry);
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TargetLowering::CallLoweringInfo CLI(DAG);
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CLI.setDebugLoc(dl)
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.setChain(Chain)
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.setLibCallee(CallingConv::C, Type::getVoidTy(*DAG.getContext()),
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DAG.getExternalSymbol(bzeroName, IntPtr),
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std::move(Args))
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.setDiscardResult();
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std::pair<SDValue, SDValue> CallResult = TLI.LowerCallTo(CLI);
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return CallResult.second;
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}
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return SDValue();
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}
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bool AArch64SelectionDAGInfo::generateFMAsInMachineCombiner(
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CodeGenOpt::Level OptLevel) const {
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return OptLevel >= CodeGenOpt::Aggressive;
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}
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