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between the two instructions. If there's a pattern like: $xA = ADRP foo @PAGE [some killing use of reg Xb] $Xb = ADDXri $Xa, 0, @PAGEOFF CollectLOH would create an AdrpAdd LOH that resulted in the linker optimizing this sequence into: $xB = ADR foo [some killing use of reg $Xb] ... and therefore clobbers the live $Xb register that was used by the instruction in between. This was discovered by a GlobalISel patch D78465 which broke up global variable accesses into two pseudos, which in some cases could be moved apart. Differential Revision: https://reviews.llvm.org/D80834 |
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utils | ||
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configure | ||
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LICENSE.TXT | ||
llvm.spec.in | ||
LLVMBuild.txt | ||
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RELEASE_TESTERS.TXT |
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