Daniel Dunbar 5620b11961 Disable this test for now... ... llvm-svn: 125361		2011-02-11 02:59:08 +00:00
..
Alpha
ARM	Fix buggy fcopysign lowering.	2011-02-11 02:28:55 +00:00
Blackfin
CBackend
CellSPU	Allow sign-extending of i8 and i16 to i128 on SPU.	2011-01-20 15:49:06 +00:00
CPP
Generic
MBlaze
Mips	Disable this test for now...	2011-02-11 02:59:08 +00:00
MSP430
PowerPC
PTX	ptx: add passing parameter to kernel functions	2011-02-10 12:01:24 +00:00
SPARC	Pass sret arguments through the stack instead of through registers in Sparc backend. It makes the code generated more compliant with the sparc32 ABI.	2011-01-22 13:05:16 +00:00
SystemZ
Thumb
Thumb2	Move a test that ended up in the wrong place.	2011-02-05 04:15:50 +00:00
X86	After 3-addressifying a two-address instruction, update the register maps; add a missing check when considering whether it's profitable to commute. rdar://8977508.	2011-02-10 02:20:55 +00:00
XCore	Add intrinsic for setc instruction on the XCore.	2011-02-09 13:22:12 +00:00