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e04cc6cb43
instructions to subtarget features and update tests to reflect. PR5717. llvm-svn: 103136
49 lines
1.1 KiB
LLVM
49 lines
1.1 KiB
LLVM
; RUN: llc < %s -march=thumb -mattr=+thumb2,+t2xtpk | FileCheck %s
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define i32 @t2ADDrs_lsl(i32 %X, i32 %Y) {
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; CHECK: t2ADDrs_lsl
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; CHECK: add.w r0, r0, r1, lsl #16
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%A = shl i32 %Y, 16
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%B = add i32 %X, %A
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ret i32 %B
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}
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define i32 @t2ADDrs_lsr(i32 %X, i32 %Y) {
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; CHECK: t2ADDrs_lsr
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; CHECK: add.w r0, r0, r1, lsr #16
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%A = lshr i32 %Y, 16
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%B = add i32 %X, %A
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ret i32 %B
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}
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define i32 @t2ADDrs_asr(i32 %X, i32 %Y) {
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; CHECK: t2ADDrs_asr
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; CHECK: add.w r0, r0, r1, asr #16
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%A = ashr i32 %Y, 16
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%B = add i32 %X, %A
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ret i32 %B
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}
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; i32 ror(n) = (x >> n) | (x << (32 - n))
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define i32 @t2ADDrs_ror(i32 %X, i32 %Y) {
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; CHECK: t2ADDrs_ror
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; CHECK: add.w r0, r0, r1, ror #16
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%A = lshr i32 %Y, 16
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%B = shl i32 %Y, 16
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%C = or i32 %B, %A
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%R = add i32 %X, %C
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ret i32 %R
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}
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define i32 @t2ADDrs_noRegShift(i32 %X, i32 %Y, i8 %sh) {
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; CHECK: t2ADDrs_noRegShift
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; CHECK: uxtb r2, r2
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; CHECK: lsls r1, r2
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; CHECK: add r0, r1
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%shift.upgrd.1 = zext i8 %sh to i32
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%A = shl i32 %Y, %shift.upgrd.1
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%B = add i32 %X, %A
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ret i32 %B
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}
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