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6ee594a265
Summary: Previously there were two separate pseudo instruction for SDWA on VI and on GFX9. Created one pseudo instruction that is union of both of them. Added verifier to check that operands conform either VI or GFX9. Reviewers: dp, arsenm, vpykhtin Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, artem.tamazov Differential Revision: https://reviews.llvm.org/D34026 llvm-svn: 305886
76 lines
2.3 KiB
C++
76 lines
2.3 KiB
C++
//===-- AMDGPUCodeEmitter.h - AMDGPU Code Emitter interface -----*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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/// \file
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/// \brief CodeEmitter interface for R600 and SI codegen.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_AMDGPU_MCTARGETDESC_AMDGPUMCCODEEMITTER_H
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#define LLVM_LIB_TARGET_AMDGPU_MCTARGETDESC_AMDGPUMCCODEEMITTER_H
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#include "llvm/MC/MCCodeEmitter.h"
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#include "llvm/Support/raw_ostream.h"
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namespace llvm {
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class MCInst;
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class MCInstrInfo;
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class MCOperand;
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class MCSubtargetInfo;
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class FeatureBitset;
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class AMDGPUMCCodeEmitter : public MCCodeEmitter {
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virtual void anchor();
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protected:
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const MCInstrInfo &MCII;
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AMDGPUMCCodeEmitter(const MCInstrInfo &mcii) : MCII(mcii) {}
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public:
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uint64_t getBinaryCodeForInstr(const MCInst &MI,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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virtual uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const {
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return 0;
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}
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virtual unsigned getSOPPBrEncoding(const MCInst &MI, unsigned OpNo,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const {
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return 0;
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}
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virtual unsigned getSDWASrcEncoding(const MCInst &MI, unsigned OpNo,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const {
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return 0;
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}
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virtual unsigned getSDWAVopcDstEncoding(const MCInst &MI, unsigned OpNo,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const {
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return 0;
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}
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protected:
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uint64_t computeAvailableFeatures(const FeatureBitset &FB) const;
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void verifyInstructionPredicates(const MCInst &MI,
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uint64_t AvailableFeatures) const;
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};
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} // End namespace llvm
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#endif
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