1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-23 03:02:36 +01:00
llvm-mirror/tools/llvm-mca/Views
Andrew Savonichev 182b0cd903 [MCA] Disable RCU for InOrderIssueStage
This is a follow-up for:
D98604 [MCA] Ensure that writes occur in-order

When instructions are aligned by the order of writes, they retire
in-order naturally. There is no need for an RCU, so it is disabled.

Differential Revision: https://reviews.llvm.org/D98628
2021-03-24 13:54:04 +03:00
..
BottleneckAnalysis.cpp
BottleneckAnalysis.h
DispatchStatistics.cpp
DispatchStatistics.h
InstructionInfoView.cpp
InstructionInfoView.h
InstructionView.cpp
InstructionView.h
RegisterFileStatistics.cpp
RegisterFileStatistics.h
ResourcePressureView.cpp
ResourcePressureView.h
RetireControlUnitStatistics.cpp
RetireControlUnitStatistics.h
SchedulerStatistics.cpp
SchedulerStatistics.h
SummaryView.cpp
SummaryView.h
TimelineView.cpp
TimelineView.h
View.cpp
View.h