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https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-23 11:13:28 +01:00
168 lines
4.2 KiB
LLVM
168 lines
4.2 KiB
LLVM
; RUN: llc -march=mipsel -mcpu=mips32r6 -relocation-model=pic < %s | FileCheck %s -check-prefixes=ALL,09BIT
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; RUN: llc -march=mipsel -mattr=+micromips -relocation-model=pic < %s | FileCheck %s -check-prefixes=ALL,12BIT
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; RUN: llc -march=mipsel -relocation-model=pic < %s | FileCheck %s -check-prefixes=ALL,16BIT
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@data = global [8193 x i32] zeroinitializer
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define void @ZC(i32 *%p) nounwind {
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entry:
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; ALL-LABEL: ZC:
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call void asm sideeffect "lw $$1, $0", "*^ZC,~{$1}"(i32* getelementptr inbounds ([8193 x i32], [8193 x i32]* @data, i32 0, i32 0))
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; ALL: lw $[[BASEPTR:[0-9]+]], %got(data)(
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; ALL: #APP
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; ALL: lw $1, 0($[[BASEPTR]])
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; ALL: #NO_APP
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ret void
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}
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define void @ZC_offset_n4(i32 *%p) nounwind {
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entry:
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; ALL-LABEL: ZC_offset_n4:
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call void asm sideeffect "lw $$1, $0", "*^ZC,~{$1}"(i32* getelementptr inbounds ([8193 x i32], [8193 x i32]* @data, i32 0, i32 -1))
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; ALL: lw $[[BASEPTR:[0-9]+]], %got(data)(
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; ALL: #APP
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; ALL: lw $1, -4($[[BASEPTR]])
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; ALL: #NO_APP
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ret void
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}
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define void @ZC_offset_4(i32 *%p) nounwind {
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entry:
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; ALL-LABEL: ZC_offset_4:
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call void asm sideeffect "lw $$1, $0", "*^ZC,~{$1}"(i32* getelementptr inbounds ([8193 x i32], [8193 x i32]* @data, i32 0, i32 1))
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; ALL: lw $[[BASEPTR:[0-9]+]], %got(data)(
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; ALL: #APP
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; ALL: lw $1, 4($[[BASEPTR]])
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; ALL: #NO_APP
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ret void
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}
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define void @ZC_offset_252(i32 *%p) nounwind {
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entry:
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; ALL-LABEL: ZC_offset_252:
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call void asm sideeffect "lw $$1, $0", "*^ZC,~{$1}"(i32* getelementptr inbounds ([8193 x i32], [8193 x i32]* @data, i32 0, i32 63))
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; ALL: lw $[[BASEPTR:[0-9]+]], %got(data)(
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; ALL: #APP
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; ALL: lw $1, 252($[[BASEPTR]])
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; ALL: #NO_APP
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ret void
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}
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define void @ZC_offset_256(i32 *%p) nounwind {
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entry:
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; ALL-LABEL: ZC_offset_256:
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call void asm sideeffect "lw $$1, $0", "*^ZC,~{$1}"(i32* getelementptr inbounds ([8193 x i32], [8193 x i32]* @data, i32 0, i32 64))
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; ALL: lw $[[BASEPTR:[0-9]+]], %got(data)(
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; 09BIT: addiu $[[BASEPTR2:[0-9]+]], $[[BASEPTR]], 256
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; ALL: #APP
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; 09BIT: lw $1, 0($[[BASEPTR2]])
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; 12BIT: lw $1, 256($[[BASEPTR]])
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; 16BIT: lw $1, 256($[[BASEPTR]])
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; ALL: #NO_APP
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ret void
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}
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define void @ZC_offset_2044(i32 *%p) nounwind {
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entry:
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; ALL-LABEL: ZC_offset_2044:
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call void asm sideeffect "lw $$1, $0", "*^ZC,~{$1}"(i32* getelementptr inbounds ([8193 x i32], [8193 x i32]* @data, i32 0, i32 511))
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; ALL: lw $[[BASEPTR:[0-9]+]], %got(data)(
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; 09BIT: addiu $[[BASEPTR2:[0-9]+]], $[[BASEPTR]], 2044
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; ALL: #APP
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; 09BIT: lw $1, 0($[[BASEPTR2]])
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; 12BIT: lw $1, 2044($[[BASEPTR]])
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; 16BIT: lw $1, 2044($[[BASEPTR]])
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; ALL: #NO_APP
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ret void
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}
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define void @ZC_offset_2048(i32 *%p) nounwind {
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entry:
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; ALL-LABEL: ZC_offset_2048:
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call void asm sideeffect "lw $$1, $0", "*^ZC,~{$1}"(i32* getelementptr inbounds ([8193 x i32], [8193 x i32]* @data, i32 0, i32 512))
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; ALL: lw $[[BASEPTR:[0-9]+]], %got(data)(
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; 09BIT: addiu $[[BASEPTR2:[0-9]+]], $[[BASEPTR]], 2048
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; 12BIT: addiu $[[BASEPTR2:[0-9]+]], $[[BASEPTR]], 2048
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; ALL: #APP
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; 09BIT: lw $1, 0($[[BASEPTR2]])
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; 12BIT: lw $1, 0($[[BASEPTR2]])
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; 16BIT: lw $1, 2048($[[BASEPTR]])
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; ALL: #NO_APP
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ret void
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}
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define void @ZC_offset_32764(i32 *%p) nounwind {
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entry:
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; ALL-LABEL: ZC_offset_32764:
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call void asm sideeffect "lw $$1, $0", "*^ZC,~{$1}"(i32* getelementptr inbounds ([8193 x i32], [8193 x i32]* @data, i32 0, i32 8191))
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; ALL-DAG: lw $[[BASEPTR:[0-9]+]], %got(data)(
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; 09BIT: addiu $[[BASEPTR2:[0-9]+]], $[[BASEPTR]], 32764
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; 12BIT: addiu $[[BASEPTR2:[0-9]+]], $[[BASEPTR]], 32764
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; ALL: #APP
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; 09BIT: lw $1, 0($[[BASEPTR2]])
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; 12BIT: lw $1, 0($[[BASEPTR2]])
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; 16BIT: lw $1, 32764($[[BASEPTR]])
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; ALL: #NO_APP
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ret void
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}
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define void @ZC_offset_32768(i32 *%p) nounwind {
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entry:
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; ALL-LABEL: ZC_offset_32768:
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call void asm sideeffect "lw $$1, $0", "*^ZC,~{$1}"(i32* getelementptr inbounds ([8193 x i32], [8193 x i32]* @data, i32 0, i32 8192))
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; ALL-DAG: lw $[[BASEPTR:[0-9]+]], %got(data)(
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; ALL-DAG: ori $[[T0:[0-9]+]], $zero, 32768
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; 09BIT: addu $[[BASEPTR2:[0-9]+]], $[[BASEPTR]], $[[T0]]
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; 12BIT: addu16 $[[BASEPTR2:[0-9]+]], $[[BASEPTR]], $[[T0]]
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; 16BIT: addu $[[BASEPTR2:[0-9]+]], $[[BASEPTR]], $[[T0]]
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; ALL: #APP
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; ALL: lw $1, 0($[[BASEPTR2]])
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; ALL: #NO_APP
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ret void
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}
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