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b22de2b27f
The checks we have for complete models are not great and miss many cases - e.g. in PR35636 it failed to recognise that only the first output (of 2) was actually tagged by the InstRW Raised PR35639 and PR35643 as examples llvm-svn: 320492
36 lines
1.2 KiB
LLVM
36 lines
1.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=znver1 | FileCheck %s
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define void @_Z15uint64_to_asciimPc(i64 %arg) {
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; CHECK-LABEL: _Z15uint64_to_asciimPc:
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; CHECK: # %bb.0: # %bb
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; CHECK-NEXT: movabsq $811296384146066817, %rax # imm = 0xB424DC35095CD81
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; CHECK-NEXT: movq %rdi, %rdx
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; CHECK-NEXT: mulxq %rax, %rax, %rcx
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; CHECK-NEXT: shrq $42, %rcx
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; CHECK-NEXT: imulq $281474977, %rcx, %rax # imm = 0x10C6F7A1
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; CHECK-NEXT: shrq $20, %rax
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; CHECK-NEXT: leal 5(%rax,%rax,4), %eax
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; CHECK-NEXT: andl $134217727, %eax # imm = 0x7FFFFFF
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; CHECK-NEXT: leal (%rax,%rax,4), %eax
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; CHECK-NEXT: shrl $26, %eax
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; CHECK-NEXT: orb $48, %al
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; CHECK-NEXT: movb %al, (%rax)
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; CHECK-NEXT: retq
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bb:
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%tmp = udiv i64 %arg, 100000000000000
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%tmp1 = mul nuw nsw i64 %tmp, 281474977
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%tmp2 = lshr i64 %tmp1, 20
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%tmp3 = trunc i64 %tmp2 to i32
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%tmp4 = add nuw nsw i32 %tmp3, 1
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%tmp5 = and i32 %tmp4, 268435455
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%tmp6 = mul nuw nsw i32 %tmp5, 5
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%tmp7 = and i32 %tmp6, 134217727
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%tmp8 = mul nuw nsw i32 %tmp7, 5
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%tmp9 = lshr i32 %tmp8, 26
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%tmp10 = trunc i32 %tmp9 to i8
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%tmp11 = or i8 %tmp10, 48
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store i8 %tmp11, i8* undef, align 1
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ret void
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}
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