mirror of
https://github.com/RPCS3/llvm-mirror.git
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f59acc15ad
Summary: This is a resurrection of work first proposed and discussed in Aug 2015: http://lists.llvm.org/pipermail/llvm-dev/2015-August/089384.html and initially landed (but then backed out) in Nov 2015: http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20151109/312083.html The @llvm.memcpy/memmove/memset intrinsics currently have an explicit argument which is required to be a constant integer. It represents the alignment of the dest (and source), and so must be the minimum of the actual alignment of the two. This change is the first in a series that allows source and dest to each have their own alignments by using the alignment attribute on their arguments. In this change we: 1) Remove the alignment argument. 2) Add alignment attributes to the source & dest arguments. We, temporarily, require that the alignments for source & dest be equal. For example, code which used to read: call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 100, i32 4, i1 false) will now read call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %dest, i8* align 4 %src, i32 100, i1 false) Downstream users may have to update their lit tests that check for @llvm.memcpy/memmove/memset call/declaration patterns. The following extended sed script may help with updating the majority of your tests, but it does not catch all possible patterns so some manual checking and updating will be required. s~declare void @llvm\.mem(set|cpy|move)\.p([^(]*)\((.*), i32, i1\)~declare void @llvm.mem\1.p\2(\3, i1)~g s~call void @llvm\.memset\.p([^(]*)i8\(i8([^*]*)\* (.*), i8 (.*), i8 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.memset.p\1i8(i8\2* \3, i8 \4, i8 \5, i1 \6)~g s~call void @llvm\.memset\.p([^(]*)i16\(i8([^*]*)\* (.*), i8 (.*), i16 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.memset.p\1i16(i8\2* \3, i8 \4, i16 \5, i1 \6)~g s~call void @llvm\.memset\.p([^(]*)i32\(i8([^*]*)\* (.*), i8 (.*), i32 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.memset.p\1i32(i8\2* \3, i8 \4, i32 \5, i1 \6)~g s~call void @llvm\.memset\.p([^(]*)i64\(i8([^*]*)\* (.*), i8 (.*), i64 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.memset.p\1i64(i8\2* \3, i8 \4, i64 \5, i1 \6)~g s~call void @llvm\.memset\.p([^(]*)i128\(i8([^*]*)\* (.*), i8 (.*), i128 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.memset.p\1i128(i8\2* \3, i8 \4, i128 \5, i1 \6)~g s~call void @llvm\.memset\.p([^(]*)i8\(i8([^*]*)\* (.*), i8 (.*), i8 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.memset.p\1i8(i8\2* align \6 \3, i8 \4, i8 \5, i1 \7)~g s~call void @llvm\.memset\.p([^(]*)i16\(i8([^*]*)\* (.*), i8 (.*), i16 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.memset.p\1i16(i8\2* align \6 \3, i8 \4, i16 \5, i1 \7)~g s~call void @llvm\.memset\.p([^(]*)i32\(i8([^*]*)\* (.*), i8 (.*), i32 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.memset.p\1i32(i8\2* align \6 \3, i8 \4, i32 \5, i1 \7)~g s~call void @llvm\.memset\.p([^(]*)i64\(i8([^*]*)\* (.*), i8 (.*), i64 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.memset.p\1i64(i8\2* align \6 \3, i8 \4, i64 \5, i1 \7)~g s~call void @llvm\.memset\.p([^(]*)i128\(i8([^*]*)\* (.*), i8 (.*), i128 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.memset.p\1i128(i8\2* align \6 \3, i8 \4, i128 \5, i1 \7)~g s~call void @llvm\.mem(cpy|move)\.p([^(]*)i8\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i8 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.mem\1.p\2i8(i8\3* \4, i8\5* \6, i8 \7, i1 \8)~g s~call void @llvm\.mem(cpy|move)\.p([^(]*)i16\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i16 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.mem\1.p\2i16(i8\3* \4, i8\5* \6, i16 \7, i1 \8)~g s~call void @llvm\.mem(cpy|move)\.p([^(]*)i32\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i32 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.mem\1.p\2i32(i8\3* \4, i8\5* \6, i32 \7, i1 \8)~g s~call void @llvm\.mem(cpy|move)\.p([^(]*)i64\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i64 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.mem\1.p\2i64(i8\3* \4, i8\5* \6, i64 \7, i1 \8)~g s~call void @llvm\.mem(cpy|move)\.p([^(]*)i128\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i128 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.mem\1.p\2i128(i8\3* \4, i8\5* \6, i128 \7, i1 \8)~g s~call void @llvm\.mem(cpy|move)\.p([^(]*)i8\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i8 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.mem\1.p\2i8(i8\3* align \8 \4, i8\5* align \8 \6, i8 \7, i1 \9)~g s~call void @llvm\.mem(cpy|move)\.p([^(]*)i16\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i16 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.mem\1.p\2i16(i8\3* align \8 \4, i8\5* align \8 \6, i16 \7, i1 \9)~g s~call void @llvm\.mem(cpy|move)\.p([^(]*)i32\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i32 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.mem\1.p\2i32(i8\3* align \8 \4, i8\5* align \8 \6, i32 \7, i1 \9)~g s~call void @llvm\.mem(cpy|move)\.p([^(]*)i64\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i64 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.mem\1.p\2i64(i8\3* align \8 \4, i8\5* align \8 \6, i64 \7, i1 \9)~g s~call void @llvm\.mem(cpy|move)\.p([^(]*)i128\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i128 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.mem\1.p\2i128(i8\3* align \8 \4, i8\5* align \8 \6, i128 \7, i1 \9)~g The remaining changes in the series will: Step 2) Expand the IRBuilder API to allow creation of memcpy/memmove with differing source and dest alignments. Step 3) Update Clang to use the new IRBuilder API. Step 4) Update Polly to use the new IRBuilder API. Step 5) Update LLVM passes that create memcpy/memmove calls to use the new IRBuilder API, and those that use use MemIntrinsicInst::[get|set]Alignment() to use getDestAlignment() and getSourceAlignment() instead. Step 6) Remove the single-alignment IRBuilder API for memcpy/memmove, and the MemIntrinsicInst::[get|set]Alignment() methods. Reviewers: pete, hfinkel, lhames, reames, bollu Reviewed By: reames Subscribers: niosHD, reames, jholewinski, qcolombet, jfb, sanjoy, arsenm, dschuff, dylanmckay, mehdi_amini, sdardis, nemanjai, david2050, nhaehnle, javed.absar, sbc100, jgravelle-google, eraman, aheejin, kbarton, JDevlieghere, asb, rbar, johnrusso, simoncook, jordy.potman.lists, apazos, sabuasal, llvm-commits Differential Revision: https://reviews.llvm.org/D41675 llvm-svn: 322965
224 lines
7.8 KiB
LLVM
224 lines
7.8 KiB
LLVM
; RUN: llc -mtriple=i686-pc-win32 -mattr=+sse2 < %s | FileCheck %s --check-prefix=CHECK --check-prefix=X86
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; RUN: llc -mtriple=x86_64-pc-win32 < %s | FileCheck %s --check-prefix=CHECK --check-prefix=X64
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; Test integer arguments.
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define x86_vectorcallcc i32 @test_int_1() {
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ret i32 0
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}
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; CHECK-LABEL: {{^}}test_int_1@@0:
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; CHECK: xorl %eax, %eax
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define x86_vectorcallcc i32 @test_int_2(i32 inreg %a) {
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ret i32 %a
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}
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; X86-LABEL: {{^}}test_int_2@@4:
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; X64-LABEL: {{^}}test_int_2@@8:
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; CHECK: movl %ecx, %eax
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define x86_vectorcallcc i32 @test_int_3(i64 inreg %a) {
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%at = trunc i64 %a to i32
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ret i32 %at
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}
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; X86-LABEL: {{^}}test_int_3@@8:
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; X64-LABEL: {{^}}test_int_3@@8:
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; CHECK: movl %ecx, %eax
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define x86_vectorcallcc i32 @test_int_4(i32 inreg %a, i32 inreg %b) {
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%s = add i32 %a, %b
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ret i32 %s
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}
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; X86-LABEL: {{^}}test_int_4@@8:
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; X86: leal (%ecx,%edx), %eax
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; X64-LABEL: {{^}}test_int_4@@16:
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; X64: leal (%rcx,%rdx), %eax
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define x86_vectorcallcc i32 @"\01test_int_5"(i32, i32) {
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ret i32 0
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}
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; CHECK-LABEL: {{^}}test_int_5:
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define x86_vectorcallcc double @test_fp_1(double %a, double %b) {
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ret double %b
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}
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; CHECK-LABEL: {{^}}test_fp_1@@16:
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; CHECK: movaps %xmm1, %xmm0
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define x86_vectorcallcc double @test_fp_2(
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double, double, double, double, double, double, double %r) {
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ret double %r
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}
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; CHECK-LABEL: {{^}}test_fp_2@@56:
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; CHECK: movsd {{[0-9]+\(%[re]sp\)}}, %xmm0
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define x86_vectorcallcc {double, double, double, double} @test_fp_3() {
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ret {double, double, double, double}
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{ double 0.0, double 0.0, double 0.0, double 0.0 }
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}
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; CHECK-LABEL: {{^}}test_fp_3@@0:
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; CHECK: xorps %xmm0
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; CHECK: xorps %xmm1
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; CHECK: xorps %xmm2
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; CHECK: xorps %xmm3
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; FIXME: Returning via x87 isn't compatible, but its hard to structure the
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; tablegen any other way.
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define x86_vectorcallcc {double, double, double, double, double} @test_fp_4() {
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ret {double, double, double, double, double}
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{ double 0.0, double 0.0, double 0.0, double 0.0, double 0.0 }
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}
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; CHECK-LABEL: {{^}}test_fp_4@@0:
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; CHECK: fldz
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; CHECK: xorps %xmm0
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; CHECK: xorps %xmm1
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; CHECK: xorps %xmm2
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; CHECK: xorps %xmm3
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define x86_vectorcallcc <16 x i8> @test_vec_1(<16 x i8> %a, <16 x i8> %b) {
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ret <16 x i8> %b
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}
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; CHECK-LABEL: {{^}}test_vec_1@@32:
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; CHECK: movaps %xmm1, %xmm0
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define x86_vectorcallcc <16 x i8> @test_vec_2(
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double, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> %r) {
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ret <16 x i8> %r
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}
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; CHECK-LABEL: {{^}}test_vec_2@@104:
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; x64: movq {{[0-9]*}}(%rsp), %rax
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; CHECK: movaps (%{{rax|ecx}}), %xmm0
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%struct.HVA5 = type { <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float> }
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%struct.HVA4 = type { <4 x float>, <4 x float>, <4 x float>, <4 x float> }
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%struct.HVA3 = type { <4 x float>, <4 x float>, <4 x float> }
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%struct.HVA2 = type { <4 x float>, <4 x float> }
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define x86_vectorcallcc <4 x float> @test_mixed_1(i32 %a, %struct.HVA4 inreg %bb, i32 %c) {
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entry:
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%b = alloca %struct.HVA4, align 16
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store %struct.HVA4 %bb, %struct.HVA4* %b, align 16
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%w1 = getelementptr inbounds %struct.HVA4, %struct.HVA4* %b, i32 0, i32 1
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%0 = load <4 x float>, <4 x float>* %w1, align 16
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ret <4 x float> %0
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}
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; CHECK-LABEL: test_mixed_1
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; CHECK: movaps %xmm1, 16(%{{(e|r)}}sp)
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; CHECK: movaps %xmm1, %xmm0
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; CHECK: ret{{q|l}}
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define x86_vectorcallcc <4 x float> @test_mixed_2(%struct.HVA4 inreg %a, %struct.HVA4* %b, <4 x float> %c) {
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entry:
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%c.addr = alloca <4 x float>, align 16
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store <4 x float> %c, <4 x float>* %c.addr, align 16
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%0 = load <4 x float>, <4 x float>* %c.addr, align 16
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ret <4 x float> %0
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}
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; CHECK-LABEL: test_mixed_2
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; X86: movaps %xmm0, (%esp)
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; X64: movaps %xmm2, %xmm0
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; CHECK: ret{{[ql]}}
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define x86_vectorcallcc <4 x float> @test_mixed_3(<4 x float> %a, <4 x float> %b, <4 x float> %c, <4 x float> %d, <4 x float> %e, %struct.HVA2* %f) {
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entry:
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%x = getelementptr inbounds %struct.HVA2, %struct.HVA2* %f, i32 0, i32 0
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%0 = load <4 x float>, <4 x float>* %x, align 16
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ret <4 x float> %0
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}
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; CHECK-LABEL: test_mixed_3
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; CHECK: movaps (%{{[re][ac]}}x), %xmm0
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; CHECK: ret{{[ql]}}
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define x86_vectorcallcc <4 x float> @test_mixed_4(%struct.HVA4 inreg %a, %struct.HVA2* %bb, <4 x float> %c) {
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entry:
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%y4 = getelementptr inbounds %struct.HVA2, %struct.HVA2* %bb, i32 0, i32 1
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%0 = load <4 x float>, <4 x float>* %y4, align 16
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ret <4 x float> %0
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}
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; CHECK-LABEL: test_mixed_4
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; X86: movaps 16(%eax), %xmm0
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; X64: movaps 16(%rdx), %xmm0
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; CHECK: ret{{[ql]}}
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define x86_vectorcallcc <4 x float> @test_mixed_5(%struct.HVA3 inreg %a, %struct.HVA3* %b, <4 x float> %c, %struct.HVA2 inreg %dd) {
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entry:
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%d = alloca %struct.HVA2, align 16
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store %struct.HVA2 %dd, %struct.HVA2* %d, align 16
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%y5 = getelementptr inbounds %struct.HVA2, %struct.HVA2* %d, i32 0, i32 1
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%0 = load <4 x float>, <4 x float>* %y5, align 16
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ret <4 x float> %0
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}
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; CHECK-LABEL: test_mixed_5
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; CHECK: movaps %xmm5, 16(%{{(e|r)}}sp)
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; CHECK: movaps %xmm5, %xmm0
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; CHECK: ret{{[ql]}}
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define x86_vectorcallcc %struct.HVA4 @test_mixed_6(%struct.HVA4 inreg %a, %struct.HVA4* %b) {
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entry:
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%retval = alloca %struct.HVA4, align 16
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%0 = bitcast %struct.HVA4* %retval to i8*
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%1 = bitcast %struct.HVA4* %b to i8*
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call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 16 %0, i8* align 16 %1, i32 64, i1 false)
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%2 = load %struct.HVA4, %struct.HVA4* %retval, align 16
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ret %struct.HVA4 %2
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}
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; CHECK-LABEL: test_mixed_6
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; CHECK: movaps (%{{[re]}}sp), %xmm0
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; CHECK: movaps 16(%{{[re]}}sp), %xmm1
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; CHECK: movaps 32(%{{[re]}}sp), %xmm2
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; CHECK: movaps 48(%{{[re]}}sp), %xmm3
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; CHECK: ret{{[ql]}}
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declare void @llvm.memset.p0i8.i64(i8* nocapture writeonly, i8, i64, i1)
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declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture writeonly, i8* nocapture readonly, i64, i1)
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declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture writeonly, i8* nocapture readonly, i32, i1)
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define x86_vectorcallcc void @test_mixed_7(%struct.HVA5* noalias sret %agg.result) {
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entry:
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%a = alloca %struct.HVA5, align 16
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%0 = bitcast %struct.HVA5* %a to i8*
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call void @llvm.memset.p0i8.i64(i8* align 16 %0, i8 0, i64 80, i1 false)
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%1 = bitcast %struct.HVA5* %agg.result to i8*
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%2 = bitcast %struct.HVA5* %a to i8*
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call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 %1, i8* align 16 %2, i64 80, i1 false)
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ret void
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}
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; CHECK-LABEL: test_mixed_7
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; CHECK: movaps %xmm{{[0-9]}}, 64(%{{rcx|eax}})
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; CHECK: movaps %xmm{{[0-9]}}, 48(%{{rcx|eax}})
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; CHECK: movaps %xmm{{[0-9]}}, 32(%{{rcx|eax}})
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; CHECK: movaps %xmm{{[0-9]}}, 16(%{{rcx|eax}})
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; CHECK: movaps %xmm{{[0-9]}}, (%{{rcx|eax}})
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; X64: mov{{[ql]}} %rcx, %rax
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; CHECK: ret{{[ql]}}
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define x86_vectorcallcc <4 x float> @test_mixed_8(<4 x float> %a, <4 x float> %b, <4 x float> %c, <4 x float> %d, i32 %e, <4 x float> %f) {
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entry:
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%f.addr = alloca <4 x float>, align 16
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store <4 x float> %f, <4 x float>* %f.addr, align 16
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%0 = load <4 x float>, <4 x float>* %f.addr, align 16
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ret <4 x float> %0
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}
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; CHECK-LABEL: test_mixed_8
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; X86: movaps %xmm4, %xmm0
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; X64: movaps %xmm5, %xmm0
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; CHECK: ret{{[ql]}}
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%struct.HFA4 = type { double, double, double, double }
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declare x86_vectorcallcc double @test_mixed_9_callee(%struct.HFA4 %x, double %y)
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define x86_vectorcallcc double @test_mixed_9_caller(%struct.HFA4 inreg %b) {
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entry:
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%call = call x86_vectorcallcc double @test_mixed_9_callee(%struct.HFA4 inreg %b, double 3.000000e+00)
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%add = fadd double 1.000000e+00, %call
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ret double %add
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}
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; CHECK-LABEL: test_mixed_9_caller
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; CHECK: movaps %xmm3, %xmm4
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; CHECK: movaps %xmm2, %xmm3
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; CHECK: movaps %xmm1, %xmm2
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; X32: movasd %xmm0, %xmm1
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; X64: movap{{d|s}} %xmm5, %xmm1
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; CHECK: call{{l|q}} test_mixed_9_callee@@40
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; CHECK: addsd {{.*}}, %xmm0
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; CHECK: ret{{l|q}}
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