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llvm-mirror/test/CodeGen
Craig Topper 9f5737a6bd [X86] Remove VPERM2F128/VPERM2I128 intrinsics and autoupgrade to native shuffles.
I've moved the test cases from the InstCombine optimizations to the backend to keep the coverage we had there. It covered every possible immediate so I've preserved the resulting shuffle mask for each of those immediates.

llvm-svn: 313450
2017-09-16 07:36:14 +00:00
..
AArch64 [AArch64] allow v8f16 types when FullFP16 is supported 2017-09-15 09:24:48 +00:00
AMDGPU AMDGPU: Fix violating constant bus restriction 2017-09-14 20:54:29 +00:00
ARC
ARM Add newline to end of test file. NFC. 2017-09-14 14:48:59 +00:00
AVR
BPF
Generic
Hexagon [IfConversion] More simple, correct dead/kill liveness handling 2017-09-14 15:53:11 +00:00
Inputs
Lanai
Mips [mips] Pick the right variant of DINS upfront and enable target instruction verification 2017-09-14 10:58:00 +00:00
MIR
MSP430
Nios2
NVPTX
PowerPC [XRay][CodeGen] Use the current function symbol as the associated symbol for the instrumentation map 2017-09-14 07:08:23 +00:00
SPARC
SystemZ Move llvm/test/CodeGen/X86/clear-liverange-spillreg.mir to SystemZ. It was in wrong place. 2017-09-14 00:03:23 +00:00
Thumb
Thumb2
WebAssembly [WebAssembly] Add sign extend instructions from atomics proposal 2017-09-13 00:29:06 +00:00
WinEH
X86 [X86] Remove VPERM2F128/VPERM2I128 intrinsics and autoupgrade to native shuffles. 2017-09-16 07:36:14 +00:00
XCore