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b74cf30c85
Summary: valid-xfail.s is for instructions that should be valid in the given ISA but incorrectly fail. DSP/DSPr2 instructions are correct to fail since DSP/DSPr2 is not enabled. Reviewers: vkalintiris Subscribers: dsanders, llvm-commits Differential Revision: http://reviews.llvm.org/D15072 llvm-svn: 254911
131 lines
4.5 KiB
ArmAsm
131 lines
4.5 KiB
ArmAsm
# Instructions that should be valid but currently fail for known reasons (e.g.
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# they aren't implemented yet).
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# This test is set up to XPASS if any instruction generates an encoding.
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#
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# RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r3 | not FileCheck %s
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# CHECK-NOT: encoding
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# XFAIL: *
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.set noat
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abs.ps $f22,$f8
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add.ps $f25,$f27,$f13
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addqh.w $s7,$s7,$k1
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addqh_r.w $8,$v1,$zero
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alnv.ps $f12,$f18,$f30,$12
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c.eq.d $fcc1,$f15,$f15
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c.eq.ps $fcc5,$f0,$f9
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c.eq.s $fcc5,$f24,$f17
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c.f.d $fcc4,$f11,$f21
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c.f.ps $fcc6,$f11,$f11
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c.f.s $fcc4,$f30,$f7
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c.le.d $fcc4,$f18,$f1
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c.le.ps $fcc1,$f7,$f20
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c.le.s $fcc6,$f24,$f4
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c.lt.d $fcc3,$f9,$f3
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c.lt.ps $f19,$f5
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c.lt.s $fcc2,$f17,$f14
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c.nge.d $fcc5,$f21,$f16
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c.nge.ps $f1,$f26
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c.nge.s $fcc3,$f11,$f8
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c.ngl.ps $f21,$f30
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c.ngl.s $fcc2,$f31,$f23
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c.ngle.ps $fcc7,$f12,$f20
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c.ngle.s $fcc2,$f18,$f23
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c.ngt.d $fcc4,$f24,$f7
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c.ngt.ps $fcc5,$f30,$f6
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c.ngt.s $fcc5,$f8,$f13
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c.ole.d $fcc2,$f16,$f31
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c.ole.ps $fcc7,$f21,$f8
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c.ole.s $fcc3,$f7,$f20
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c.olt.d $fcc4,$f19,$f28
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c.olt.ps $fcc3,$f7,$f16
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c.olt.s $fcc6,$f20,$f7
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c.seq.d $fcc4,$f31,$f7
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c.seq.ps $fcc6,$f31,$f14
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c.seq.s $fcc7,$f1,$f25
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c.sf.ps $fcc6,$f4,$f6
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c.ueq.d $fcc4,$f13,$f25
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c.ueq.ps $fcc1,$f5,$f29
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c.ueq.s $fcc6,$f3,$f30
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c.ule.d $fcc7,$f25,$f18
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c.ule.ps $fcc6,$f17,$f3
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c.ule.s $fcc7,$f21,$f30
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c.ult.d $fcc6,$f6,$f17
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c.ult.ps $fcc7,$f14,$f0
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c.ult.s $fcc7,$f24,$f10
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c.un.d $fcc6,$f23,$f24
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c.un.ps $fcc4,$f2,$f26
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c.un.s $fcc1,$f30,$f4
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ceil.l.d $f1,$f3
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ceil.l.s $f18,$f13
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cfcmsa $s6,$19
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ctcmsa $31,$s7
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cvt.d.l $f4,$f16
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cvt.ps.s $f3,$f18,$f19
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cvt.s.l $f15,$f30
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cvt.s.pl $f30,$f1
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cvt.s.pu $f14,$f25
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dmt $k0
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dvpe $s6
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emt $8
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evpe $v0
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floor.l.d $f26,$f7
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floor.l.s $f12,$f5
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fork $s2,$8,$a0
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iret
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lbe $14,122($9)
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lbue $11,-108($10)
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lhe $s6,219($v1)
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lhue $gp,118($11)
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lle $gp,-237($ra)
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lwe $ra,-145($14)
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lwle $11,-42($11)
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lwre $sp,-152($24)
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madd.ps $f22,$f3,$f14,$f3
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mfgc0 $s6,c0_datahi1
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mov.ps $f22,$f17
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movf.ps $f10,$f28,$fcc6
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movn.ps $f31,$f31,$s3
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movt.ps $f20,$f25,$fcc2
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movz.ps $f18,$f17,$ra
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msub.ps $f12,$f14,$f29,$f17
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mtc0 $9,c0_datahi1
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mtgc0 $s4,$21,7
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mul.ps $f14,$f0,$f16
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neg.ps $f19,$f13
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nmadd.ps $f27,$f4,$f9,$f25
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nmsub.ps $f6,$f12,$f14,$f17
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pll.ps $f25,$f9,$f30
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plu.ps $f1,$f26,$f29
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preceq.w.phl $s8,$gp
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preceq.w.phr $s5,$15
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pul.ps $f9,$f30,$f26
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puu.ps $f24,$f9,$f2
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rdpgpr $s3,$9
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recip.d $f19,$f6
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recip.s $f3,$f30
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rorv $13,$a3,$s5
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round.l.d $f12,$f1
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round.l.s $f25,$f5
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rsqrt.d $f3,$f28
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rsqrt.s $f4,$f8
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sbe $s7,33($s1)
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sce $sp,189($10)
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she $24,105($v0)
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sub.ps $f5,$f14,$f26
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swe $24,94($k0)
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swle $v1,-209($gp)
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swre $k0,-202($s2)
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tlbginv
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tlbginvf
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tlbgp
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tlbgr
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tlbgwi
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tlbgwr
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tlbinv
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tlbinvf
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trunc.l.d $f23,$f23
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trunc.l.s $f28,$f31
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wrpgpr $zero,$13
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yield $v1,$s0
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