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llvm-mirror/test/CodeGen/Hexagon/expand-condsets-dead-pred.ll
Sumanth Gundapaneni 262321d1ff [Hexagon] New HVX target features.
This patch lets the llvm tools handle the new HVX target features that
are added by frontend (clang). The target-features are of the form
"hvx-length64b" for 64 Byte HVX mode, "hvx-length128b" for 128 Byte mode HVX.
"hvx-double" is an alias to "hvx-length128b" and is soon will be deprecated.
The hvx version target feature is upgated form "+hvx" to "+hvxv{version_number}.
Eg: "+hvxv62"

For the correct HVX code generation, the user must use the following
target features.
For 64B mode: "+hvxv62" "+hvx-length64b"
For 128B mode: "+hvxv62" "+hvx-length128b"

Clang picks a default length if none is specified. If for some reason,
no hvx-length is specified to llvm, the compilation will bail out.
There is a corresponding clang patch.

Differential Revision: https://reviews.llvm.org/D38851

llvm-svn: 316101
2017-10-18 18:07:07 +00:00

46 lines
1.4 KiB
LLVM

; RUN: llc -march=hexagon -verify-machineinstrs < %s | FileCheck %s
; REQUIRES: asserts
; Check for some output (as opposed to a crash).
; CHECK: loop0
target triple = "hexagon"
@x = external local_unnamed_addr global [80 x i32], align 8
; Function Attrs: nounwind
define void @fred() local_unnamed_addr #0 {
b0:
br label %b1
b1: ; preds = %b20, %b0
br label %b2
b2: ; preds = %b2, %b1
%v3 = phi i32 [ 0, %b1 ], [ %v17, %b2 ]
%v4 = phi i32 [ 0, %b1 ], [ %v16, %b2 ]
%v5 = phi i32 [ undef, %b1 ], [ %v18, %b2 ]
%v6 = load i32, i32* undef, align 8
%v7 = icmp sgt i32 %v6, undef
%v8 = select i1 %v7, i32 %v3, i32 %v4
%v9 = select i1 undef, i32 0, i32 %v8
%v10 = select i1 undef, i32 undef, i32 %v9
%v11 = select i1 undef, i32 0, i32 %v10
%v12 = icmp sgt i32 undef, 0
%v13 = select i1 %v12, i32 undef, i32 %v11
%v14 = select i1 false, i32 undef, i32 %v13
%v15 = select i1 false, i32 undef, i32 %v14
%v16 = select i1 false, i32 undef, i32 %v15
%v17 = add nsw i32 %v3, 8
%v18 = add i32 %v5, -8
%v19 = icmp eq i32 %v18, 0
br i1 %v19, label %b20, label %b2
b20: ; preds = %b2
%v21 = getelementptr inbounds [80 x i32], [80 x i32]* @x, i32 0, i32 %v16
store i32 -2000, i32* %v21, align 4
br label %b1
}
attributes #0 = { nounwind "target-cpu"="hexagonv55" "target-features"="-hvx,-long-calls" }