Matt Arsenault a02881be87 AMDGPU/SI: Fix printing useless info with amdhsa ... The comments at the bottom would all report 0 if amdhsa was used. llvm-svn: 245135		2015-08-15 00:12:39 +00:00
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AArch64	[AArch64] Fix FMLS scalar-indexed-from-2s-after-neg patterns.	2015-08-14 22:06:05 +00:00
AMDGPU	AMDGPU/SI: Fix printing useless info with amdhsa	2015-08-15 00:12:39 +00:00
ARM	Revert "[ARM] Fix MachO CPU Subtype selection"	2015-08-14 19:35:47 +00:00
BPF
CPP
Generic	Update test suite to make "ninja check" succeed without native backend builtin	2015-08-04 06:32:54 +00:00
Hexagon	DI: Disallow uniquable DICompileUnits	2015-08-03 17:26:41 +00:00
Inputs	DI: Disallow uniquable DICompileUnits	2015-08-03 17:26:41 +00:00
Mips	Revert r229675 - [mips] Avoid redundant sign extension of the result of binary bitwise instructions.	2015-08-04 14:26:35 +00:00
MIR	MIR Serialization: Serialize the '.cfi_same_value' CFI directive.	2015-08-14 21:55:58 +00:00
MSP430
NVPTX	Use 32-bit divides instead of 64-bit divides where possible.	2015-08-11 22:16:34 +00:00
PowerPC	Scalar to vector conversions using direct moves	2015-08-13 17:40:44 +00:00
SPARC	[Sparc] Implement i64 load/store support for 32-bit sparc.	2015-08-10 19:11:39 +00:00
SystemZ	[SystemZ] Support large LLVM IR struct return values	2015-08-13 13:37:06 +00:00
Thumb	DI: Disallow uniquable DICompileUnits	2015-08-03 17:26:41 +00:00
Thumb2	ARMLoadStoreOptimizer: Create LDRD/STRD on thumb2	2015-07-21 00:18:59 +00:00
WebAssembly	WebAssembly: floating-point comparisons	2015-08-12 17:53:29 +00:00
WinEH	Add a target environment for CoreCLR.	2015-08-14 22:41:43 +00:00
X86	make current codegen visible in the checks, so we can decide if it's right	2015-08-14 23:03:01 +00:00
XCore	DI: Disallow uniquable DICompileUnits	2015-08-03 17:26:41 +00:00