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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-20 03:23:01 +02:00
llvm-mirror/test/MC
Mitch Phillips 4cdf8a5d36 Revert "Reland D64327 [MC][ELF] Allow STT_SECTION referencing SHF_MERGE on REL targets"
This reverts commit b497665d98ad5026b1d3d67d5793a28fefe27bea.

Spent some time trying to reproduce this locally, reverting in a
desparate attempt to fix the sanitizer buildbot:
 - http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux/builds/28828

I don't know exactly why or how this patch breaks the bots, but it seems
pretty concrete that it's the culprit.
2020-08-07 10:56:33 -07:00
..
AArch64 [AArch64] [Windows] Error out on unsupported symbol locations 2020-08-06 09:23:46 +03:00
AMDGPU [AMDGPU] gfx1031 target 2020-08-05 12:36:26 -07:00
ARM [ARM] Fix Asm/Disasm of TBB/TBH instructions 2020-07-22 09:31:56 +01:00
AsmParser [MC] Support infix operator ! 2020-07-30 23:25:53 -07:00
AVR [AVRInstPrinter] printOperand: support llvm-objdump --print-imm-hex 2020-07-12 08:14:52 -07:00
BPF [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
COFF [MC] [COFF] Make sure that weak external symbols are undefined symbols 2020-07-24 22:15:08 +03:00
Disassembler [PowerPC] Add Vector Extract/Expand/Count with Mask, Move to VSR Mask Instruction Definitions and MC Tests 2020-08-07 11:02:08 -05:00
ELF Revert "Reland D64327 [MC][ELF] Allow STT_SECTION referencing SHF_MERGE on REL targets" 2020-08-07 10:56:33 -07:00
Hexagon [llvm-readobj] Update tests because of changes in llvm-readobj behavior 2020-07-20 10:39:04 +01:00
Lanai [lit] Delete empty lines at the end of lit.local.cfg NFC 2019-06-17 09:51:07 +00:00
MachO [llvm-readobj] Update tests because of changes in llvm-readobj behavior 2020-07-20 10:39:04 +01:00
Mips Revert "Reland D64327 [MC][ELF] Allow STT_SECTION referencing SHF_MERGE on REL targets" 2020-08-07 10:56:33 -07:00
MSP430 [llvm-readobj] Update tests because of changes in llvm-readobj behavior 2020-07-20 10:39:04 +01:00
PowerPC [PowerPC] Add Vector Extract/Expand/Count with Mask, Move to VSR Mask Instruction Definitions and MC Tests 2020-08-07 11:02:08 -05:00
RISCV Upgrade MC to v0.9. 2020-08-01 07:42:06 +08:00
Sparc [llvm-readobj] Update tests because of changes in llvm-readobj behavior 2020-07-20 10:39:04 +01:00
SystemZ [llvm-readobj] Update tests because of changes in llvm-readobj behavior 2020-07-20 10:39:04 +01:00
VE [VE] Support symbol with offset in assembly 2020-07-07 04:16:51 +09:00
WebAssembly [WebAssembly] Implement prototype v128.load{32,64}_zero instructions 2020-08-03 13:54:00 -07:00
X86 [X86] support .nops directive 2020-08-03 11:50:56 -07:00