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Summary: This is preparation for ThunderX processors that have Large System Extension (LSE) atomic instructions, but not the other instructions introduced by V8.1a. This will mimic changes to GCC as described here: https://gcc.gnu.org/ml/gcc-patches/2015-06/msg00388.html LSE instructions are: LD/ST<op>, CAS*, SWP Reviewers: t.p.northover, echristo, jmolloy, rengolin Subscribers: aemerson, mehdi_amini Differential Revision: https://reviews.llvm.org/D26621 llvm-svn: 288279
9 lines
294 B
ArmAsm
9 lines
294 B
ArmAsm
// RUN: not llvm-mc -triple=arm64-linux-gnu -mattr=armv8.1a -mattr=-lse < %s 2> %t
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// RUN: FileCheck --check-prefix=CHECK-ERROR < %t %s
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casa w5, w7, [x20]
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// CHECK-ERROR: error: instruction requires: lse
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// CHECK-ERROR-NEXT: casa w5, w7, [x20]
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// CHECK-ERROR-NEXT: ^
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