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llvm-mirror/test/CodeGen/MIR/NVPTX/expected-floating-point-literal.mir
Puyan Lotfi bb3ea20b55 [MIR] Repurposing '$' sigil used by external symbols. Replacing with '&'.
Planning to add support for named vregs. This puts is in a conundrum since
physregs are named as well. To rectify this we need to use a sigil other than
'%' for physregs in MIR. We've settled on using '$' for physregs but first we
must repurpose it from external symbols using it, which is what this commit is
all about. We think '&' will have familiar semantics for C/C++ users.

llvm-svn: 322146
2018-01-10 00:56:48 +00:00

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# RUN: not llc -march=nvptx -mcpu=sm_20 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
--- |
define float @test(float %k) {
entry:
%0 = fadd float %k, 3.250000e+00
ret float %0
}
...
---
name: test
registers:
- { id: 0, class: float32regs }
- { id: 1, class: float32regs }
body: |
bb.0.entry:
%0 = LD_f32_avar 0, 4, 1, 2, 32, &test_param_0
; CHECK: [[@LINE+1]]:33: expected a floating point literal
%1 = FADD_rnf32ri %0, float 3
StoreRetvalF32 %1, 0
Return
...