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9efb6203d0
This patch aims to match the changes introduced in gcc by https://gcc.gnu.org/ml/gcc-cvs/2018-04/msg00534.html. The IBT feature definition is removed, with the IBT instructions being freely available on all X86 targets. The shadow stack instructions are also being made freely available, and the use of all these CET instructions is controlled by the module flags derived from the -fcf-protection clang option. The hasSHSTK option remains since clang uses it to determine availability of shadow stack instruction intrinsics, but it is no longer directly used. Comes with a clang patch (D46881). Patch by mike.dvoretsky Differential Revision: https://reviews.llvm.org/D46882 llvm-svn: 332705
107 lines
2.5 KiB
LLVM
107 lines
2.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+shstk | FileCheck %s
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define void @test_incsspd(i32 %a) local_unnamed_addr {
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; CHECK-LABEL: test_incsspd:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: incsspd %eax
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; CHECK-NEXT: retl
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entry:
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tail call void @llvm.x86.incsspd(i32 %a)
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ret void
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}
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declare void @llvm.x86.incsspd(i32)
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define i32 @test_rdsspd(i32 %a) {
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; CHECK-LABEL: test_rdsspd:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: rdsspd %eax
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; CHECK-NEXT: retl
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entry:
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%0 = call i32 @llvm.x86.rdsspd(i32 %a)
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ret i32 %0
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}
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declare i32 @llvm.x86.rdsspd(i32)
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define void @test_saveprevssp() {
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; CHECK-LABEL: test_saveprevssp:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: saveprevssp
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; CHECK-NEXT: retl
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entry:
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tail call void @llvm.x86.saveprevssp()
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ret void
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}
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declare void @llvm.x86.saveprevssp()
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define void @test_rstorssp(i8* %__p) {
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; CHECK-LABEL: test_rstorssp:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: rstorssp (%eax)
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; CHECK-NEXT: retl
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entry:
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tail call void @llvm.x86.rstorssp(i8* %__p)
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ret void
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}
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declare void @llvm.x86.rstorssp(i8*)
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define void @test_wrssd(i32 %a, i8* %__p) {
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; CHECK-LABEL: test_wrssd:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; CHECK-NEXT: wrssd %eax, (%ecx)
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; CHECK-NEXT: retl
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entry:
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tail call void @llvm.x86.wrssd(i32 %a, i8* %__p)
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ret void
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}
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declare void @llvm.x86.wrssd(i32, i8*)
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define void @test_wrussd(i32 %a, i8* %__p) {
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; CHECK-LABEL: test_wrussd:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; CHECK-NEXT: wrussd %eax, (%ecx)
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; CHECK-NEXT: retl
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entry:
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tail call void @llvm.x86.wrussd(i32 %a, i8* %__p)
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ret void
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}
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declare void @llvm.x86.wrussd(i32, i8*)
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define void @test_setssbsy() {
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; CHECK-LABEL: test_setssbsy:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: setssbsy
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; CHECK-NEXT: retl
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entry:
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tail call void @llvm.x86.setssbsy()
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ret void
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}
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declare void @llvm.x86.setssbsy()
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define void @test_clrssbsy(i8* %__p) {
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; CHECK-LABEL: test_clrssbsy:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: clrssbsy (%eax)
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; CHECK-NEXT: retl
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entry:
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tail call void @llvm.x86.clrssbsy(i8* %__p)
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ret void
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}
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declare void @llvm.x86.clrssbsy(i8* %__p)
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