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llvm-mirror/test/CodeGen
Duncan Sands a29a3a24a7 Speculatively revert commit 164885 (nadav) in the hope of ressurecting a pile of
buildbots.  Original commit message:

A DAGCombine optimization for merging consecutive stores. This optimization is not profitable in many cases
because moden processos can store multiple values in parallel, and preparing the consecutive store requires
some work.  We only handle these cases:

1. Consecutive stores where the values and consecutive loads. For example:
  int a = p->a;
  int b = p->b;
  q->a = a;
  q->b = b;

2. Consecutive stores where the values are constants. Foe example:
  q->a = 4;
  q->b = 5;

llvm-svn: 164890
2012-09-29 10:25:35 +00:00
..
ARM Enable the new coalescer algorithm by default. 2012-09-27 21:06:02 +00:00
CellSPU Add test triples to fix win32 failures. Revert workaround from r161292. 2012-08-08 20:31:37 +00:00
CPP test commit 2012-07-18 17:53:05 +00:00
Generic BranchProb: modify the definition of an edge in BranchProbabilityInfo to handle 2012-08-24 18:14:27 +00:00
Hexagon LLVM Bug Fix 13709: Remove needless lsr(Rp, #32) instruction access the 2012-09-05 16:01:40 +00:00
MBlaze
Mips MIPS DSP: add operands to make sure instruction strings are being matched. 2012-09-28 21:23:16 +00:00
MSP430 Reapply r161633-161634 "Partition use lists so defs always come before uses."" 2012-08-10 00:21:30 +00:00
NVPTX
PowerPC Specify MachinePointerInfo as refering to the argument value and offset of the 2012-09-24 20:47:19 +00:00
SPARC Move load_to_switch.ll to test/CodeGen/SPARC/ 2012-09-19 09:25:03 +00:00
Thumb Fix Thumb2 fixup kind in the integrated-as. 2012-09-01 15:06:36 +00:00
Thumb2 Use vld1 / vst2 for unaligned v2f64 load / store. e.g. Use vld1.16 for 2-byte 2012-09-18 01:42:45 +00:00
X86 Speculatively revert commit 164885 (nadav) in the hope of ressurecting a pile of 2012-09-29 10:25:35 +00:00
XCore Fix pattern for MKMSK instruction. 2012-06-13 17:59:12 +00:00