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https://github.com/RPCS3/llvm-mirror.git
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8755396e8d
The benefits of this change include: 1. Remove DeMorgan-matching code that was added specifically to work-around the missing transform in http://reviews.llvm.org/rL248634. 2. Makes the DeMorgan transform work for vectors too. 3. Fix PR28476: https://llvm.org/bugs/show_bug.cgi?id=28476 Extending this transform to other casts and other associative operators may be useful too. See https://reviews.llvm.org/D22421 for a prerequisite for doing that though. Differential Revision: https://reviews.llvm.org/D22271 llvm-svn: 276221
73 lines
2.2 KiB
LLVM
73 lines
2.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instcombine -S | FileCheck %s
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define i64 @test_sext_zext(i16 %A) {
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; CHECK-LABEL: @test_sext_zext(
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; CHECK-NEXT: [[C2:%.*]] = zext i16 %A to i64
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; CHECK-NEXT: ret i64 [[C2]]
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;
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%c1 = zext i16 %A to i32
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%c2 = sext i32 %c1 to i64
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ret i64 %c2
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}
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define <2 x i64> @test2(<2 x i1> %A) {
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; CHECK-LABEL: @test2(
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; CHECK-NEXT: [[XOR:%.*]] = xor <2 x i1> %A, <i1 true, i1 true>
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; CHECK-NEXT: [[ZEXT:%.*]] = zext <2 x i1> [[XOR]] to <2 x i64>
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; CHECK-NEXT: ret <2 x i64> [[ZEXT]]
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;
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%xor = xor <2 x i1> %A, <i1 true, i1 true>
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%zext = zext <2 x i1> %xor to <2 x i64>
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ret <2 x i64> %zext
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}
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define <2 x i64> @test3(<2 x i64> %A) {
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; CHECK-LABEL: @test3(
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; CHECK-NEXT: [[AND:%.*]] = and <2 x i64> %A, <i64 23, i64 42>
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; CHECK-NEXT: ret <2 x i64> [[AND]]
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;
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%trunc = trunc <2 x i64> %A to <2 x i32>
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%and = and <2 x i32> %trunc, <i32 23, i32 42>
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%zext = zext <2 x i32> %and to <2 x i64>
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ret <2 x i64> %zext
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}
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define <2 x i64> @test4(<2 x i64> %A) {
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; CHECK-LABEL: @test4(
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; CHECK-NEXT: [[TMP1:%.*]] = xor <2 x i64> %A, <i64 4294967295, i64 4294967295>
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; CHECK-NEXT: [[XOR:%.*]] = and <2 x i64> [[TMP1]], <i64 23, i64 42>
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; CHECK-NEXT: ret <2 x i64> [[XOR]]
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;
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%trunc = trunc <2 x i64> %A to <2 x i32>
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%and = and <2 x i32> %trunc, <i32 23, i32 42>
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%xor = xor <2 x i32> %and, <i32 23, i32 42>
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%zext = zext <2 x i32> %xor to <2 x i64>
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ret <2 x i64> %zext
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}
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define i64 @fold_xor_zext_sandwich(i1 %a) {
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; CHECK-LABEL: @fold_xor_zext_sandwich(
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; CHECK-NEXT: [[TMP1:%.*]] = xor i1 %a, true
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; CHECK-NEXT: [[ZEXT2:%.*]] = zext i1 [[TMP1]] to i64
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; CHECK-NEXT: ret i64 [[ZEXT2]]
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;
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%zext1 = zext i1 %a to i32
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%xor = xor i32 %zext1, 1
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%zext2 = zext i32 %xor to i64
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ret i64 %zext2
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}
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define <2 x i64> @fold_xor_zext_sandwich_vec(<2 x i1> %a) {
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; CHECK-LABEL: @fold_xor_zext_sandwich_vec(
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; CHECK-NEXT: [[TMP1:%.*]] = xor <2 x i1> %a, <i1 true, i1 true>
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; CHECK-NEXT: [[ZEXT2:%.*]] = zext <2 x i1> [[TMP1]] to <2 x i64>
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; CHECK-NEXT: ret <2 x i64> [[ZEXT2]]
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;
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%zext1 = zext <2 x i1> %a to <2 x i32>
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%xor = xor <2 x i32> %zext1, <i32 1, i32 1>
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%zext2 = zext <2 x i32> %xor to <2 x i64>
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ret <2 x i64> %zext2
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}
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