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5f15092063
This patch series adds support for the IBM z14 processor. This part includes: - Basic support for the new processor and its features. - Support for new instructions (except vector 32-bit float and 128-bit float). - CodeGen for new instructions, including new LLVM intrinsics. - Scheduler description for the new processor. - Detection of z14 as host processor. Support for the new 32-bit vector float and 128-bit vector float instructions is provided by separate patches. llvm-svn: 308194
33 lines
687 B
LLVM
33 lines
687 B
LLVM
; Test three-operand multiplication instructions on z14.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s
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; Check MSRKC.
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define i32 @f1(i32 %dummy, i32 %a, i32 %b) {
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; CHECK-LABEL: f1:
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; CHECK: msrkc %r2, %r3, %r4
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; CHECK: br %r14
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%mul = mul i32 %a, %b
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ret i32 %mul
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}
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; Check MSGRKC.
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define i64 @f2(i64 %dummy, i64 %a, i64 %b) {
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; CHECK-LABEL: f2:
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; CHECK: msgrkc %r2, %r3, %r4
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; CHECK: br %r14
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%mul = mul i64 %a, %b
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ret i64 %mul
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}
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; Verify that we still use MSGFR for i32->i64 multiplies.
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define i64 @f3(i64 %a, i32 %b) {
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; CHECK-LABEL: f3:
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; CHECK: msgfr %r2, %r3
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; CHECK: br %r14
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%bext = sext i32 %b to i64
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%mul = mul i64 %a, %bext
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ret i64 %mul
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}
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