Artem Belevich dff5eed453 [NVPTX] Fix lowering of fp16 ISD::FNEG. ... There's no neg.f16 instruction, so negation has to be done via subtraction from zero. Differential Revision: https://reviews.llvm.org/D28876 llvm-svn: 292452		2017-01-19 00:14:45 +00:00
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Analysis	[SCEV] Make getUDivExactExpr handle non-nuw multiplies correctly.	2017-01-18 23:56:42 +00:00
Assembler
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BugPoint
CodeGen	[NVPTX] Fix lowering of fp16 ISD::FNEG.	2017-01-19 00:14:45 +00:00
DebugInfo
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MC	[Assembler] Fix crash when assembling .quad for AArch32.	2017-01-18 15:02:54 +00:00
Object	[Object] Fixup permissions of input files.	2017-01-16 23:28:58 +00:00
ObjectYAML
Other	[PM] Teach the LoopPassManager to automatically canonicalize loops by	2017-01-17 19:18:12 +00:00
SymbolRewriter
TableGen
ThinLTO/X86	[ThinLTO] Add a recursive step in Metadata lazy-loading	2017-01-18 18:36:21 +00:00
tools	[ARM] Create SubtargetFeatures from build attrs	2017-01-18 15:52:11 +00:00
Transforms	[InstCombine] add tests for shl nsw with icmp eq/ne; NFCI	2017-01-18 21:31:21 +00:00
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