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a31553dbf7
TableGen infers unmodeled side effects on instructions without a pattern. Fix some instruction definitions where that was overlooked. Also raise an error if a rematerializable instruction has unmodeled side effects. That doen't make any sense. llvm-svn: 141929 |
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Analysis | ||
Archive | ||
AsmParser | ||
Bitcode | ||
CodeGen | ||
DebugInfo | ||
ExecutionEngine | ||
Linker | ||
MC | ||
Object | ||
Support | ||
TableGen | ||
Target | ||
Transforms | ||
VMCore | ||
CMakeLists.txt | ||
Makefile |