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7465703e27
This patch adds a CFI entry for each SVE callee saved register that needs unwind info at an offset from the CFA. The offset is a DWARF expression because the offset is partly scalable. The CFI entries only cover a subset of the SVE callee-saves and only encodes the lower 64-bits, thus implementing the lowest common denominator ABI. Existing unwinders may support VG but only restore the lower 64-bits. Reviewed By: efriedma Differential Revision: https://reviews.llvm.org/D84044 |
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| .. | ||
| AArch64 | ||
| AMDGPU | ||
| ARC | ||
| ARM | ||
| AVR | ||
| BPF | ||
| Generic | ||
| Hexagon | ||
| Inputs | ||
| Lanai | ||
| Mips | ||
| MIR | ||
| MSP430 | ||
| NVPTX | ||
| PowerPC | ||
| RISCV | ||
| SPARC | ||
| SystemZ | ||
| Thumb | ||
| Thumb2 | ||
| VE | ||
| WebAssembly | ||
| WinCFGuard | ||
| WinEH | ||
| X86 | ||
| XCore | ||