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e1e1463f1c
PAC/BTI-related codegen in the AArch64 backend is controlled by a set of LLVM IR function attributes, added to the function by Clang, based on command-line options and GCC-style function attributes. However, functions, generated in the LLVM middle end (for example, asan.module.ctor or __llvm_gcov_write_out) do not get any attributes and the backend incorrectly does not do any PAC/BTI code generation. This patch record the default state of PAC/BTI codegen in a set of LLVM IR module-level attributes, based on command-line options: * "sign-return-address", with non-zero value means generate code to sign return addresses (PAC-RET), zero value means disable PAC-RET. * "sign-return-address-all", with non-zero value means enable PAC-RET for all functions, zero value means enable PAC-RET only for functions, which spill LR. * "sign-return-address-with-bkey", with non-zero value means use B-key for signing, zero value mean use A-key. This set of attributes are always added for AArch64 targets (as opposed, for example, to interpreting a missing attribute as having a value 0) in order to be able to check for conflicts when combining module attributed during LTO. Module-level attributes are overridden by function level attributes. All the decision making about whether to not to generate PAC and/or BTI code is factored out into AArch64FunctionInfo, there shouldn't be any places left, other than AArch64FunctionInfo, which directly examine PAC/BTI attributes, except AArch64AsmPrinter.cpp, which is/will-be handled by a separate patch. Differential Revision: https://reviews.llvm.org/D85649
72 lines
2.6 KiB
LLVM
72 lines
2.6 KiB
LLVM
;; RUN: llc --mattr=+v8.3a %s -o - | FileCheck %s
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target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
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target triple = "aarch64-unknown-linux"
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@__llvm_gcov_ctr = internal global [1 x i64] zeroinitializer
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@0 = private unnamed_addr constant [7 x i8] c"m.gcda\00", align 1
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@llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 0, void ()* @__llvm_gcov_init, i8* null }]
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define dso_local i32 @f() local_unnamed_addr #0 {
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entry:
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ret i32 0
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}
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;; CHECK-LABEL: f:
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;; CHECK: pacibsp
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declare void @llvm_gcda_start_file(i8*, i32, i32) local_unnamed_addr
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declare void @llvm_gcda_emit_function(i32, i32, i32) local_unnamed_addr
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declare void @llvm_gcda_emit_arcs(i32, i64*) local_unnamed_addr
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declare void @llvm_gcda_summary_info() local_unnamed_addr
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declare void @llvm_gcda_end_file() local_unnamed_addr
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define internal void @__llvm_gcov_writeout() unnamed_addr #1 {
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entry:
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tail call void @llvm_gcda_start_file(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @0, i64 0, i64 0), i32 875575338, i32 0)
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tail call void @llvm_gcda_emit_function(i32 0, i32 0, i32 0)
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tail call void @llvm_gcda_emit_arcs(i32 1, i64* getelementptr inbounds ([1 x i64], [1 x i64]* @__llvm_gcov_ctr, i64 0, i64 0))
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tail call void @llvm_gcda_summary_info()
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tail call void @llvm_gcda_end_file()
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ret void
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}
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;; CHECK-LABEL: __llvm_gcov_writeout:
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;; CHECK: .cfi_b_key_frame
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;; CHECK-NEXT: pacibsp
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;; CHECK-NEXT: .cfi_negate_ra_state
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define internal void @__llvm_gcov_reset() unnamed_addr #2 {
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entry:
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store i64 0, i64* getelementptr inbounds ([1 x i64], [1 x i64]* @__llvm_gcov_ctr, i64 0, i64 0), align 8
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ret void
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}
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;; CHECK-LABEL: __llvm_gcov_reset:
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;; CHECK: pacibsp
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declare void @llvm_gcov_init(void ()*, void ()*) local_unnamed_addr
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define internal void @__llvm_gcov_init() unnamed_addr #1 {
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entry:
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tail call void @llvm_gcov_init(void ()* nonnull @__llvm_gcov_writeout, void ()* nonnull @__llvm_gcov_reset)
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ret void
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}
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;; CHECK-LABEL: __llvm_gcov_init:
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;; CHECK: .cfi_b_key_frame
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;; CHECK-NEXT: pacibsp
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;; CHECK-NEXT: .cfi_negate_ra_state
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attributes #0 = { norecurse nounwind readnone "sign-return-address"="all" "sign-return-address-key"="b_key" }
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attributes #1 = { noinline }
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attributes #2 = { nofree noinline norecurse nounwind writeonly }
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!llvm.module.flags = !{!0, !1, !2, !3, !4, !5}
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!0 = !{i32 2, !"Debug Info Version", i32 3}
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!1 = !{i32 1, !"wchar_size", i32 4}
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!2 = !{i32 1, !"branch-target-enforcement", i32 0}
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!3 = !{i32 1, !"sign-return-address", i32 1}
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!4 = !{i32 1, !"sign-return-address-all", i32 1}
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!5 = !{i32 1, !"sign-return-address-with-bkey", i32 1}
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