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e1e1463f1c
PAC/BTI-related codegen in the AArch64 backend is controlled by a set of LLVM IR function attributes, added to the function by Clang, based on command-line options and GCC-style function attributes. However, functions, generated in the LLVM middle end (for example, asan.module.ctor or __llvm_gcov_write_out) do not get any attributes and the backend incorrectly does not do any PAC/BTI code generation. This patch record the default state of PAC/BTI codegen in a set of LLVM IR module-level attributes, based on command-line options: * "sign-return-address", with non-zero value means generate code to sign return addresses (PAC-RET), zero value means disable PAC-RET. * "sign-return-address-all", with non-zero value means enable PAC-RET for all functions, zero value means enable PAC-RET only for functions, which spill LR. * "sign-return-address-with-bkey", with non-zero value means use B-key for signing, zero value mean use A-key. This set of attributes are always added for AArch64 targets (as opposed, for example, to interpreting a missing attribute as having a value 0) in order to be able to check for conflicts when combining module attributed during LTO. Module-level attributes are overridden by function level attributes. All the decision making about whether to not to generate PAC and/or BTI code is factored out into AArch64FunctionInfo, there shouldn't be any places left, other than AArch64FunctionInfo, which directly examine PAC/BTI attributes, except AArch64AsmPrinter.cpp, which is/will-be handled by a separate patch. Differential Revision: https://reviews.llvm.org/D85649
87 lines
2.5 KiB
LLVM
87 lines
2.5 KiB
LLVM
; RUN: llc -mtriple=aarch64 %s -o - | FileCheck %s
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define void @f0() "patchable-function-entry"="0" "branch-target-enforcement"="true" {
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; CHECK-LABEL: f0:
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; CHECK-NEXT: .Lfunc_begin0:
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; CHECK: // %bb.0:
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; CHECK-NEXT: hint #34
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; CHECK-NEXT: ret
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; CHECK-NOT: .section __patchable_function_entries
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ret void
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}
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;; -fpatchable-function-entry=1 -mbranch-protection=bti
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;; For M=0, place the label .Lpatch0 after the initial BTI.
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define void @f1() "patchable-function-entry"="1" "branch-target-enforcement"="true" {
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; CHECK-LABEL: f1:
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; CHECK-NEXT: .Lfunc_begin1:
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; CHECK-NEXT: .cfi_startproc
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: hint #34
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; CHECK-NEXT: .Lpatch0:
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; CHECK-NEXT: nop
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; CHECK-NEXT: ret
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; CHECK: .section __patchable_function_entries,"awo",@progbits,f1{{$}}
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; CHECK-NEXT: .p2align 3
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; CHECK-NEXT: .xword .Lpatch0
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ret void
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}
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;; -fpatchable-function-entry=2,1 -mbranch-protection=bti
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define void @f2_1() "patchable-function-entry"="1" "patchable-function-prefix"="1" "branch-target-enforcement"="true" {
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; CHECK-LABEL: .type f2_1,@function
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; CHECK-NEXT: .Ltmp0:
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; CHECK-NEXT: nop
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; CHECK-NEXT: f2_1:
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; CHECK-NEXT: .Lfunc_begin2:
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; CHECK-NEXT: .cfi_startproc
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: hint #34
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; CHECK-NEXT: nop
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; CHECK-NEXT: ret
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; CHECK: .Lfunc_end2:
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; CHECK-NEXT: .size f2_1, .Lfunc_end2-f2_1
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; CHECK: .section __patchable_function_entries,"awo",@progbits,f2_1{{$}}
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; CHECK-NEXT: .p2align 3
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; CHECK-NEXT: .xword .Ltmp0
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ret void
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}
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;; -fpatchable-function-entry=1 -mbranch-protection=bti
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;; For M=0, don't create .Lpatch0 if the initial instruction is not BTI,
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;; even if other basic blocks may have BTI.
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define internal void @f1i(i64 %v) "patchable-function-entry"="1" "branch-target-enforcement"="true" {
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; CHECK-LABEL: f1i:
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; CHECK-NEXT: .Lfunc_begin3:
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; CHECK: // %bb.0:
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; CHECK-NEXT: nop
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;; Other basic blocks have BTI, but they don't affect our decision to not create .Lpatch0
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; CHECK: .LBB{{.+}} // %sw.bb1
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; CHECK-NEXT: hint #36
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; CHECK: .section __patchable_function_entries,"awo",@progbits,f1i{{$}}
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; CHECK-NEXT: .p2align 3
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; CHECK-NEXT: .xword .Lfunc_begin3
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entry:
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switch i64 %v, label %sw.bb0 [
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i64 1, label %sw.bb1
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i64 2, label %sw.bb2
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i64 3, label %sw.bb3
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i64 4, label %sw.bb4
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]
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sw.bb0:
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call void asm sideeffect "", ""()
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ret void
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sw.bb1:
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call void asm sideeffect "", ""()
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ret void
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sw.bb2:
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call void asm sideeffect "", ""()
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ret void
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sw.bb3:
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call void asm sideeffect "", ""()
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ret void
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sw.bb4:
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call void asm sideeffect "", ""()
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ret void
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}
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