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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-21 03:53:04 +02:00
llvm-mirror/test/CodeGen
Dan Gohman a398d11527 Factor out the predicate check code from DAGISelEmitter.cpp
and use it in FastISelEmitter.cpp, and make FastISel
subtarget aware. Among other things, this lets it work
properly on x86 targets that don't have SSE, where it
successfully selects x87 instructions.

llvm-svn: 55156
2008-08-22 00:20:26 +00:00
..
Alpha Don't try to compile tests for the ev56 alpha subtarget, which hasn't been 2008-06-12 13:44:26 +00:00
ARM It's not legal to output a GV in a coalesced section if it's used in an ARM PIC relative constantpool. 2008-08-08 06:56:16 +00:00
CBackend In the CBackend, use casts to force integer add, subtract, and 2008-07-18 18:43:12 +00:00
CellSPU Add necessary 64-bit support so that gcc frontend compiles (mostly). Current 2008-06-02 22:18:03 +00:00
CPP Put CPPBackend tests into their own directory and run them only if they're 2008-07-10 22:35:32 +00:00
Generic Improve support for vector casts in LLVM IR and CodeGen. 2008-08-14 20:04:46 +00:00
IA64 sabre brings to my attention that the 'tr' suffix is also obsolete 2008-05-20 21:00:03 +00:00
Mips Support added for ctlz intrinsic, test case added. 2008-08-08 06:16:31 +00:00
PowerPC Fix a catastrophic PPC64 ABI bug: i32 operands which are passed in memory (all of the parameter registers are used) are loaded from sp offsets that were off by 4. 2008-07-24 08:17:07 +00:00
SPARC sabre brings to my attention that the 'tr' suffix is also obsolete 2008-05-20 21:00:03 +00:00
X86 Factor out the predicate check code from DAGISelEmitter.cpp 2008-08-22 00:20:26 +00:00