Andrew Trick a3ebac4349 Check output of the misched unit tests ... llvm-svn: 165959		2012-10-15 20:33:14 +00:00
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ARM	Fixed PR13938: the ARM backend was crashing because it couldn't select a VDUPLANE node with the vector input size different from the output size. This was bacause the BUILD_VECTOR lowering code didn't check that the size of the input vector was correct for using VDUPLANE.	2012-10-15 09:41:32 +00:00
CellSPU	Fix broken tests.	2012-10-02 15:49:34 +00:00
CPP
Generic
Hexagon	LLVM Bug Fix 13709: Remove needless lsr(Rp, #32) instruction access the	2012-09-05 16:01:40 +00:00
MBlaze
Mips	Div, Rem int/unsigned int	2012-10-12 02:01:09 +00:00
MSP430
NVPTX
PowerPC	llvm/test/CodeGen/PowerPC/2012-10-12-bitcast.ll: Try to fix failure on non-ppc hosts, to add -mattr=+altivec.	2012-10-12 16:01:08 +00:00
SPARC	Fix broken tests.	2012-10-02 15:49:34 +00:00
Thumb	Fix Thumb2 fixup kind in the integrated-as.	2012-09-01 15:06:36 +00:00
Thumb2	Add LLVM support for Swift.	2012-09-29 21:43:49 +00:00
X86	Check output of the misched unit tests	2012-10-15 20:33:14 +00:00
XCore