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The z13 vector facility includes some instructions that operate only on the high f64 in a v2f64, effectively extending the FP register set from 16 to 32 registers. It's still better to use the old instructions if the operands happen to fit though, since the older instructions have a shorter encoding. Based on a patch by Richard Sandiford. llvm-svn: 236524
35 lines
786 B
LLVM
35 lines
786 B
LLVM
; Test moves between FPRs.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s
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; Test f32 moves.
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define float @f1(float %a, float %b) {
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; CHECK-LABEL: f1:
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; CHECK: ler %f0, %f2
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; CHECK: br %r14
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ret float %b
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}
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; Test f64 moves.
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define double @f2(double %a, double %b) {
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; CHECK-LABEL: f2:
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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ret double %b
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}
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; Test f128 moves. Since f128s are passed by reference, we need to force
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; a copy by other means.
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define void @f3(fp128 *%x) {
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; CHECK-LABEL: f3:
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; CHECK: lxr
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; CHECK: axbr
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; CHECK: br %r14
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%val = load volatile fp128 , fp128 *%x
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%sum = fadd fp128 %val, %val
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store volatile fp128 %sum, fp128 *%x
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store volatile fp128 %val, fp128 *%x
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ret void
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}
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