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llvm-mirror/test/tools/llvm-mca/X86/Barcelona/rcu-statistics.s
Roman Lebedev f3a76c9591 [NFC][MCA][X86] Add baseline test coverage for AMD Barcelona (aka K10, fam10h)
Looking into sched model for that CPU ...

llvm-svn: 363497
2019-06-15 16:12:05 +00:00

65 lines
2.6 KiB
ArmAsm

# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -resource-pressure=false -retire-stats -iterations=1 < %s | FileCheck %s
sqrtps %xmm0, %xmm1
addps %xmm0, %xmm1
addps %xmm0, %xmm1
addps %xmm0, %xmm1
addps %xmm0, %xmm1
addps %xmm0, %xmm1
addps %xmm0, %xmm1
addps %xmm0, %xmm1
addps %xmm0, %xmm1
addps %xmm0, %xmm1
addps %xmm0, %xmm1
addps %xmm0, %xmm1
addps %xmm0, %xmm1
addps %xmm0, %xmm1
addps %xmm0, %xmm1
addps %xmm0, %xmm1
# CHECK: Iterations: 1
# CHECK-NEXT: Instructions: 16
# CHECK-NEXT: Total Cycles: 62
# CHECK-NEXT: Total uOps: 16
# CHECK: Dispatch Width: 4
# CHECK-NEXT: uOps Per Cycle: 0.26
# CHECK-NEXT: IPC: 0.26
# CHECK-NEXT: Block RThroughput: 15.0
# CHECK: Instruction Info:
# CHECK-NEXT: [1]: #uOps
# CHECK-NEXT: [2]: Latency
# CHECK-NEXT: [3]: RThroughput
# CHECK-NEXT: [4]: MayLoad
# CHECK-NEXT: [5]: MayStore
# CHECK-NEXT: [6]: HasSideEffects (U)
# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
# CHECK-NEXT: 1 14 14.00 sqrtps %xmm0, %xmm1
# CHECK-NEXT: 1 3 1.00 addps %xmm0, %xmm1
# CHECK-NEXT: 1 3 1.00 addps %xmm0, %xmm1
# CHECK-NEXT: 1 3 1.00 addps %xmm0, %xmm1
# CHECK-NEXT: 1 3 1.00 addps %xmm0, %xmm1
# CHECK-NEXT: 1 3 1.00 addps %xmm0, %xmm1
# CHECK-NEXT: 1 3 1.00 addps %xmm0, %xmm1
# CHECK-NEXT: 1 3 1.00 addps %xmm0, %xmm1
# CHECK-NEXT: 1 3 1.00 addps %xmm0, %xmm1
# CHECK-NEXT: 1 3 1.00 addps %xmm0, %xmm1
# CHECK-NEXT: 1 3 1.00 addps %xmm0, %xmm1
# CHECK-NEXT: 1 3 1.00 addps %xmm0, %xmm1
# CHECK-NEXT: 1 3 1.00 addps %xmm0, %xmm1
# CHECK-NEXT: 1 3 1.00 addps %xmm0, %xmm1
# CHECK-NEXT: 1 3 1.00 addps %xmm0, %xmm1
# CHECK-NEXT: 1 3 1.00 addps %xmm0, %xmm1
# CHECK: Retire Control Unit - number of cycles where we saw N instructions retired:
# CHECK-NEXT: [# retired], [# cycles]
# CHECK-NEXT: 0, 46 (74.2%)
# CHECK-NEXT: 1, 16 (25.8%)
# CHECK: Total ROB Entries: 168
# CHECK-NEXT: Max Used ROB Entries: 16 ( 9.5% )
# CHECK-NEXT: Average Used ROB Entries per cy: 9 ( 5.4% )