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68c567a38a
The syntax for "cmpxchg" should now look something like: cmpxchg i32* %addr, i32 42, i32 3 acquire monotonic where the second ordering argument gives the required semantics in the case that no exchange takes place. It should be no stronger than the first ordering constraint and cannot be either "release" or "acq_rel" (since no store will have taken place). rdar://problem/15996804 llvm-svn: 203559
56 lines
2.0 KiB
LLVM
56 lines
2.0 KiB
LLVM
; Test 8-bit compare and swap.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-MAIN
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT
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; Check compare and swap with a variable.
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; - CHECK is for the main loop.
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; - CHECK-SHIFT makes sure that the negated shift count used by the second
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; RLL is set up correctly. The negation is independent of the NILL and L
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; tested in CHECK. CHECK-SHIFT also checks that %r3 is not modified before
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; being used in the RISBG (in contrast to things like atomic addition,
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; which shift %r3 left so that %b is at the high end of the word).
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define i8 @f1(i8 %dummy, i8 *%src, i8 %cmp, i8 %swap) {
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; CHECK-MAIN-LABEL: f1:
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; CHECK-MAIN: sllg [[SHIFT:%r[1-9]+]], %r3, 3
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; CHECK-MAIN: nill %r3, 65532
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; CHECK-MAIN: l [[OLD:%r[0-9]+]], 0(%r3)
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; CHECK-MAIN: [[LOOP:\.[^ ]*]]:
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; CHECK-MAIN: rll %r2, [[OLD]], 8([[SHIFT]])
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; CHECK-MAIN: risbg %r4, %r2, 32, 55, 0
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; CHECK-MAIN: crjlh %r2, %r4, [[EXIT:\.[^ ]*]]
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; CHECK-MAIN: risbg %r5, %r2, 32, 55, 0
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; CHECK-MAIN: rll [[NEW:%r[0-9]+]], %r5, -8({{%r[1-9]+}})
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; CHECK-MAIN: cs [[OLD]], [[NEW]], 0(%r3)
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; CHECK-MAIN: jl [[LOOP]]
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; CHECK-MAIN: [[EXIT]]:
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; CHECK-MAIN-NOT: %r2
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; CHECK-MAIN: br %r14
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;
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; CHECK-SHIFT-LABEL: f1:
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; CHECK-SHIFT: sllg [[SHIFT:%r[1-9]+]], %r3, 3
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; CHECK-SHIFT: lcr [[NEGSHIFT:%r[1-9]+]], [[SHIFT]]
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; CHECK-SHIFT: rll
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; CHECK-SHIFT: rll {{%r[0-9]+}}, %r5, -8([[NEGSHIFT]])
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%res = cmpxchg i8 *%src, i8 %cmp, i8 %swap seq_cst seq_cst
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ret i8 %res
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}
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; Check compare and swap with constants. We should force the constants into
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; registers and use the sequence above.
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define i8 @f2(i8 *%src) {
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; CHECK-LABEL: f2:
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; CHECK: lhi [[CMP:%r[0-9]+]], 42
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; CHECK: risbg [[CMP]], {{%r[0-9]+}}, 32, 55, 0
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; CHECK: risbg
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; CHECK: br %r14
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;
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; CHECK-SHIFT-LABEL: f2:
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; CHECK-SHIFT: lhi [[SWAP:%r[0-9]+]], 88
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; CHECK-SHIFT: risbg
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; CHECK-SHIFT: risbg [[SWAP]], {{%r[0-9]+}}, 32, 55, 0
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; CHECK-SHIFT: br %r14
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%res = cmpxchg i8 *%src, i8 42, i8 88 seq_cst seq_cst
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ret i8 %res
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}
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