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8c60bbb9d2
The root cause of reverting was fixed - PR33514. Summary: The patch makes instruction count the highest priority for LSR solution for X86 (previously registers had highest priority). Reviewers: qcolombet Differential Revision: http://reviews.llvm.org/D30562 From: Evgeny Stupachenko <evstupac@gmail.com> <evgeny.v.stupachenko@intel.com> llvm-svn: 310289
35 lines
1.4 KiB
LLVM
35 lines
1.4 KiB
LLVM
; RUN: llc < %s -mtriple=i686-- -mcpu=generic | FileCheck %s
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define void @foo(float* nocapture %A, float* nocapture %B, float* nocapture %C, i32 %N) nounwind {
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; CHECK: foo
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; CHECK: incl
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entry:
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%0 = icmp sgt i32 %N, 0 ; <i1> [#uses=1]
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br i1 %0, label %bb, label %return
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bb: ; preds = %bb, %entry
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%i.03 = phi i32 [ 0, %entry ], [ %indvar.next, %bb ] ; <i32> [#uses=5]
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%1 = getelementptr float, float* %A, i32 %i.03 ; <float*> [#uses=1]
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%2 = load float, float* %1, align 4 ; <float> [#uses=1]
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%3 = getelementptr float, float* %B, i32 %i.03 ; <float*> [#uses=1]
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%4 = load float, float* %3, align 4 ; <float> [#uses=1]
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%5 = fadd float %2, %4 ; <float> [#uses=1]
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%6 = getelementptr float, float* %C, i32 %i.03 ; <float*> [#uses=1]
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store float %5, float* %6, align 4
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%7 = add i32 %i.03, 10 ; <i32> [#uses=3]
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%8 = getelementptr float, float* %A, i32 %7 ; <float*> [#uses=1]
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%9 = load float, float* %8, align 4 ; <float> [#uses=1]
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%10 = getelementptr float, float* %B, i32 %7 ; <float*> [#uses=1]
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%11 = load float, float* %10, align 4 ; <float> [#uses=1]
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%12 = fadd float %9, %11 ; <float> [#uses=1]
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%13 = getelementptr float, float* %C, i32 %7 ; <float*> [#uses=1]
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store float %12, float* %13, align 4
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%indvar.next = add i32 %i.03, 1 ; <i32> [#uses=2]
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%exitcond = icmp eq i32 %indvar.next, %N ; <i1> [#uses=1]
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br i1 %exitcond, label %return, label %bb
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return: ; preds = %bb, %entry
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ret void
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}
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