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2d0165e75c
Thumb-1 doesn't have post-inc or pre-inc load or store instructions. However the LDM/STM instructions with writeback can function as post-inc load/store:
ldm r0!, {r1} @ load from r0 into r1 and increment r0 by 4
Obviously, this only works if the post increment is 4.
llvm-svn: 275540
82 lines
2.7 KiB
LLVM
82 lines
2.7 KiB
LLVM
; RUN: llc -mtriple=thumbv7 -mcpu=cortex-m0 < %s -disable-lsr | FileCheck %s
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; FIXME: LSR mangles the last two testcases pretty badly. When this is fixed, remove
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; the -disable-lsr above.
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; CHECK-LABEL: @f
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; CHECK: ldm {{r[0-9]}}!, {r{{[0-9]}}}
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define i32 @f(i32* readonly %a, i32* readnone %b) {
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%1 = icmp eq i32* %a, %b
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br i1 %1, label %._crit_edge, label %.lr.ph
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.lr.ph: ; preds = %.lr.ph, %0
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%i.02 = phi i32 [ %3, %.lr.ph ], [ 0, %0 ]
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%.01 = phi i32* [ %4, %.lr.ph ], [ %a, %0 ]
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%2 = load i32, i32* %.01, align 4
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%3 = add nsw i32 %2, %i.02
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%4 = getelementptr inbounds i32, i32* %.01, i32 1
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%5 = icmp eq i32* %4, %b
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br i1 %5, label %._crit_edge, label %.lr.ph
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._crit_edge: ; preds = %.lr.ph, %0
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%i.0.lcssa = phi i32 [ 0, %0 ], [ %3, %.lr.ph ]
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ret i32 %i.0.lcssa
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}
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; CHECK-LABEL: @g
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; CHECK-NOT: ldm
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define i32 @g(i32* readonly %a, i32* readnone %b) {
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%1 = icmp eq i32* %a, %b
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br i1 %1, label %._crit_edge, label %.lr.ph
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.lr.ph: ; preds = %.lr.ph, %0
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%i.02 = phi i32 [ %3, %.lr.ph ], [ 0, %0 ]
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%.01 = phi i32* [ %4, %.lr.ph ], [ %a, %0 ]
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%2 = load i32, i32* %.01, align 4
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%3 = add nsw i32 %2, %i.02
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%4 = getelementptr inbounds i32, i32* %.01, i32 2
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%5 = icmp eq i32* %4, %b
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br i1 %5, label %._crit_edge, label %.lr.ph
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._crit_edge: ; preds = %.lr.ph, %0
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%i.0.lcssa = phi i32 [ 0, %0 ], [ %3, %.lr.ph ]
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ret i32 %i.0.lcssa
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}
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; CHECK-LABEL: @h
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; CHECK: stm {{r[0-9]}}!, {r{{[0-9]}}}
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define void @h(i32* %a, i32* readnone %b) {
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%1 = icmp eq i32* %a, %b
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br i1 %1, label %._crit_edge, label %.lr.ph
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.lr.ph: ; preds = %.lr.ph, %0
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%i.02 = phi i32 [ %2, %.lr.ph ], [ 0, %0 ]
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%.01 = phi i32* [ %3, %.lr.ph ], [ %a, %0 ]
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%2 = add nsw i32 %i.02, 1
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store i32 %i.02, i32* %.01, align 4
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%3 = getelementptr inbounds i32, i32* %.01, i32 1
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%4 = icmp eq i32* %3, %b
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br i1 %4, label %._crit_edge, label %.lr.ph
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._crit_edge: ; preds = %.lr.ph, %0
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ret void
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}
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; CHECK-LABEL: @j
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; CHECK-NOT: stm
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define void @j(i32* %a, i32* readnone %b) {
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%1 = icmp eq i32* %a, %b
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br i1 %1, label %._crit_edge, label %.lr.ph
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.lr.ph: ; preds = %.lr.ph, %0
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%i.02 = phi i32 [ %2, %.lr.ph ], [ 0, %0 ]
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%.01 = phi i32* [ %3, %.lr.ph ], [ %a, %0 ]
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%2 = add nsw i32 %i.02, 1
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store i32 %i.02, i32* %.01, align 4
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%3 = getelementptr inbounds i32, i32* %.01, i32 2
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%4 = icmp eq i32* %3, %b
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br i1 %4, label %._crit_edge, label %.lr.ph
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._crit_edge: ; preds = %.lr.ph, %0
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ret void
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}
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