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llvm-mirror/test/CodeGen/SystemZ/int-add-01.ll
Stephen Lin 7e501cf4c3 Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally.
This update was done with the following bash script:

  find test/CodeGen -name "*.ll" | \
  while read NAME; do
    echo "$NAME"
    if ! grep -q "^; *RUN: *llc.*debug" $NAME; then
      TEMP=`mktemp -t temp`
      cp $NAME $TEMP
      sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \
      while read FUNC; do
        sed -i '' "s/;\(.*\)\([A-Za-z0-9_-]*\):\( *\)$FUNC: *\$/;\1\2-LABEL:\3$FUNC:/g" $TEMP
      done
      sed -i '' "s/;\(.*\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP
      sed -i '' "s/;\(.*\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP
      sed -i '' "s/;\(.*\)-NOT-LABEL:/;\1-NOT:/" $TEMP
      sed -i '' "s/;\(.*\)-DAG-LABEL:/;\1-DAG:/" $TEMP
      mv $TEMP $NAME
    fi
  done

llvm-svn: 186280
2013-07-14 06:24:09 +00:00

132 lines
3.3 KiB
LLVM

; Test 32-bit addition in which the second operand is a sign-extended
; i16 memory value.
;
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
; Check the low end of the AH range.
define i32 @f1(i32 %lhs, i16 *%src) {
; CHECK-LABEL: f1:
; CHECK: ah %r2, 0(%r3)
; CHECK: br %r14
%half = load i16 *%src
%rhs = sext i16 %half to i32
%res = add i32 %lhs, %rhs
ret i32 %res
}
; Check the high end of the aligned AH range.
define i32 @f2(i32 %lhs, i16 *%src) {
; CHECK-LABEL: f2:
; CHECK: ah %r2, 4094(%r3)
; CHECK: br %r14
%ptr = getelementptr i16 *%src, i64 2047
%half = load i16 *%ptr
%rhs = sext i16 %half to i32
%res = add i32 %lhs, %rhs
ret i32 %res
}
; Check the next halfword up, which should use AHY instead of AH.
define i32 @f3(i32 %lhs, i16 *%src) {
; CHECK-LABEL: f3:
; CHECK: ahy %r2, 4096(%r3)
; CHECK: br %r14
%ptr = getelementptr i16 *%src, i64 2048
%half = load i16 *%ptr
%rhs = sext i16 %half to i32
%res = add i32 %lhs, %rhs
ret i32 %res
}
; Check the high end of the aligned AHY range.
define i32 @f4(i32 %lhs, i16 *%src) {
; CHECK-LABEL: f4:
; CHECK: ahy %r2, 524286(%r3)
; CHECK: br %r14
%ptr = getelementptr i16 *%src, i64 262143
%half = load i16 *%ptr
%rhs = sext i16 %half to i32
%res = add i32 %lhs, %rhs
ret i32 %res
}
; Check the next halfword up, which needs separate address logic.
; Other sequences besides this one would be OK.
define i32 @f5(i32 %lhs, i16 *%src) {
; CHECK-LABEL: f5:
; CHECK: agfi %r3, 524288
; CHECK: ah %r2, 0(%r3)
; CHECK: br %r14
%ptr = getelementptr i16 *%src, i64 262144
%half = load i16 *%ptr
%rhs = sext i16 %half to i32
%res = add i32 %lhs, %rhs
ret i32 %res
}
; Check the high end of the negative aligned AHY range.
define i32 @f6(i32 %lhs, i16 *%src) {
; CHECK-LABEL: f6:
; CHECK: ahy %r2, -2(%r3)
; CHECK: br %r14
%ptr = getelementptr i16 *%src, i64 -1
%half = load i16 *%ptr
%rhs = sext i16 %half to i32
%res = add i32 %lhs, %rhs
ret i32 %res
}
; Check the low end of the AHY range.
define i32 @f7(i32 %lhs, i16 *%src) {
; CHECK-LABEL: f7:
; CHECK: ahy %r2, -524288(%r3)
; CHECK: br %r14
%ptr = getelementptr i16 *%src, i64 -262144
%half = load i16 *%ptr
%rhs = sext i16 %half to i32
%res = add i32 %lhs, %rhs
ret i32 %res
}
; Check the next halfword down, which needs separate address logic.
; Other sequences besides this one would be OK.
define i32 @f8(i32 %lhs, i16 *%src) {
; CHECK-LABEL: f8:
; CHECK: agfi %r3, -524290
; CHECK: ah %r2, 0(%r3)
; CHECK: br %r14
%ptr = getelementptr i16 *%src, i64 -262145
%half = load i16 *%ptr
%rhs = sext i16 %half to i32
%res = add i32 %lhs, %rhs
ret i32 %res
}
; Check that AH allows an index.
define i32 @f9(i32 %lhs, i64 %src, i64 %index) {
; CHECK-LABEL: f9:
; CHECK: ah %r2, 4094({{%r4,%r3|%r3,%r4}})
; CHECK: br %r14
%add1 = add i64 %src, %index
%add2 = add i64 %add1, 4094
%ptr = inttoptr i64 %add2 to i16 *
%half = load i16 *%ptr
%rhs = sext i16 %half to i32
%res = add i32 %lhs, %rhs
ret i32 %res
}
; Check that AHY allows an index.
define i32 @f10(i32 %lhs, i64 %src, i64 %index) {
; CHECK-LABEL: f10:
; CHECK: ahy %r2, 4096({{%r4,%r3|%r3,%r4}})
; CHECK: br %r14
%add1 = add i64 %src, %index
%add2 = add i64 %add1, 4096
%ptr = inttoptr i64 %add2 to i16 *
%half = load i16 *%ptr
%rhs = sext i16 %half to i32
%res = add i32 %lhs, %rhs
ret i32 %res
}