mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-10-24 05:23:45 +02:00
913fc0e3df
sret arguments can never originate from an f128 argument so we detect sret arguments and push false into OriginalArgWasF128. llvm-svn: 221102
30 lines
897 B
C++
30 lines
897 B
C++
//===---- MipsABIInfo.cpp - Information about MIPS ABI's ------------------===//
|
|
//
|
|
// The LLVM Compiler Infrastructure
|
|
//
|
|
// This file is distributed under the University of Illinois Open Source
|
|
// License. See LICENSE.TXT for details.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
#include "MipsABIInfo.h"
|
|
#include "MipsRegisterInfo.h"
|
|
|
|
using namespace llvm;
|
|
|
|
namespace {
|
|
static const MCPhysReg O32IntRegs[4] = {Mips::A0, Mips::A1, Mips::A2, Mips::A3};
|
|
|
|
static const MCPhysReg Mips64IntRegs[8] = {
|
|
Mips::A0_64, Mips::A1_64, Mips::A2_64, Mips::A3_64,
|
|
Mips::T0_64, Mips::T1_64, Mips::T2_64, Mips::T3_64};
|
|
}
|
|
|
|
const ArrayRef<MCPhysReg> MipsABIInfo::GetByValArgRegs() const {
|
|
if (IsO32())
|
|
return makeArrayRef(O32IntRegs);
|
|
if (IsN32() || IsN64())
|
|
return makeArrayRef(Mips64IntRegs);
|
|
llvm_unreachable("Unhandled ABI");
|
|
}
|