1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-20 03:23:01 +02:00
llvm-mirror/test/CodeGen/X86/setcc-sentinals.ll
Jim Grosbach a6bd8c2220 DAG: Combine (and (setne X, 0), (setne X, -1)) -> (setuge (add X, 1), 2)
A common idiom is to use zero and all-ones as sentinal values and to
check for both in a single conditional ("x != 0 && x != (unsigned)-1").
That generates code, for i32, like:
  testl %edi, %edi
  setne %al
  cmpl  $-1, %edi
  setne %cl
  andb  %al, %cl

With this transform, we generate the simpler:
  incl  %edi
  cmpl  $1, %edi
  seta  %al

Similar improvements for other integer sizes and on other platforms. In
general, combining the two setcc instructions into one is better.

rdar://14689217

llvm-svn: 188315
2013-08-13 21:30:58 +00:00

14 lines
350 B
LLVM

; RUN: llc < %s -mcpu=generic -march=x86-64 -asm-verbose=false | FileCheck %s
define zeroext i1 @test0(i64 %x) nounwind {
; CHECK-LABEL: test0:
; CHECK-NEXT: incq %rdi
; CHECK-NEXT: cmpq $1, %rdi
; CHECK-NEXT: seta %al
; CHECK-NEXT: ret
%cmp1 = icmp ne i64 %x, -1
%not.cmp = icmp ne i64 %x, 0
%.cmp1 = and i1 %cmp1, %not.cmp
ret i1 %.cmp1
}