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https://github.com/RPCS3/llvm-mirror.git
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fcb1ac7304
Summary: This handles all load/store operations that WebAssembly defines, and handles those necessary for C++ such as i1. I left a FIXME for outstanding features which aren't required for now. Reviewers: sunfish Subscribers: jfb, llvm-commits, dschuff llvm-svn: 246500
101 lines
4.8 KiB
TableGen
101 lines
4.8 KiB
TableGen
// WebAssemblyInstrMemory.td-WebAssembly Memory codegen support -*- tablegen -*-
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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///
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/// \file
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/// \brief WebAssembly Memory operand code-gen constructs.
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///
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//===----------------------------------------------------------------------===//
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/*
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* TODO(jfb): Add the following.
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*
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* load_global: load the value of a given global variable
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* store_global: store a given value to a given global variable
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*/
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// FIXME:
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// - HasAddr64
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// - WebAssemblyTargetLowering::isLegalAddressingMode
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// - WebAssemblyTargetLowering having to do with atomics
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// - Each has optional alignment and immediate byte offset.
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// WebAssembly has i8/i16/i32/i64/f32/f64 memory types, but doesn't have i8/i16
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// local types. These memory-only types instead zero- or sign-extend into local
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// types when loading, and truncate when storing.
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// Basic load.
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def LOAD_I32_ : I<(outs Int32:$dst), (ins Int32:$addr),
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[(set Int32:$dst, (load Int32:$addr))]>;
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def LOAD_I64_ : I<(outs Int64:$dst), (ins Int32:$addr),
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[(set Int64:$dst, (load Int32:$addr))]>;
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def LOAD_F32_ : I<(outs Float32:$dst), (ins Int32:$addr),
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[(set Float32:$dst, (load Int32:$addr))]>;
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def LOAD_F64_ : I<(outs Float64:$dst), (ins Int32:$addr),
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[(set Float64:$dst, (load Int32:$addr))]>;
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// Extending load.
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def LOAD_SX_I8_I32_ : I<(outs Int32:$dst), (ins Int32:$addr),
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[(set Int32:$dst, (sextloadi8 Int32:$addr))]>;
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def LOAD_ZX_I8_I32_ : I<(outs Int32:$dst), (ins Int32:$addr),
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[(set Int32:$dst, (zextloadi8 Int32:$addr))]>;
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def LOAD_SX_I16_I32_ : I<(outs Int32:$dst), (ins Int32:$addr),
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[(set Int32:$dst, (sextloadi16 Int32:$addr))]>;
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def LOAD_ZX_I16_I32_ : I<(outs Int32:$dst), (ins Int32:$addr),
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[(set Int32:$dst, (zextloadi16 Int32:$addr))]>;
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def LOAD_SX_I8_I64_ : I<(outs Int64:$dst), (ins Int32:$addr),
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[(set Int64:$dst, (sextloadi8 Int32:$addr))]>;
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def LOAD_ZX_I8_I64_ : I<(outs Int64:$dst), (ins Int32:$addr),
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[(set Int64:$dst, (zextloadi8 Int32:$addr))]>;
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def LOAD_SX_I16_I64_ : I<(outs Int64:$dst), (ins Int32:$addr),
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[(set Int64:$dst, (sextloadi16 Int32:$addr))]>;
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def LOAD_ZX_I16_I64_ : I<(outs Int64:$dst), (ins Int32:$addr),
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[(set Int64:$dst, (zextloadi16 Int32:$addr))]>;
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def LOAD_SX_I32_I64_ : I<(outs Int64:$dst), (ins Int32:$addr),
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[(set Int64:$dst, (sextloadi32 Int32:$addr))]>;
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def LOAD_ZX_I32_I64_ : I<(outs Int64:$dst), (ins Int32:$addr),
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[(set Int64:$dst, (zextloadi32 Int32:$addr))]>;
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// "Don't care" extending load become zero-extending load.
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def : Pat<(i32 (extloadi8 Int32:$addr)), (LOAD_ZX_I8_I32_ $addr)>;
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def : Pat<(i32 (extloadi16 Int32:$addr)), (LOAD_ZX_I16_I32_ $addr)>;
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def : Pat<(i64 (extloadi8 Int32:$addr)), (LOAD_ZX_I8_I64_ $addr)>;
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def : Pat<(i64 (extloadi16 Int32:$addr)), (LOAD_ZX_I16_I64_ $addr)>;
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def : Pat<(i64 (extloadi32 Int32:$addr)), (LOAD_ZX_I32_I64_ $addr)>;
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// Basic store.
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// Note: WebAssembly inverts SelectionDAG's usual operand order.
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def STORE_I32_ : I<(outs), (ins Int32:$addr, Int32:$val),
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[(store Int32:$val, Int32:$addr)]>;
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def STORE_I64_ : I<(outs), (ins Int32:$addr, Int64:$val),
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[(store Int64:$val, Int32:$addr)]>;
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def STORE_F32_ : I<(outs), (ins Int32:$addr, Float32:$val),
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[(store Float32:$val, Int32:$addr)]>;
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def STORE_F64_ : I<(outs), (ins Int32:$addr, Float64:$val),
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[(store Float64:$val, Int32:$addr)]>;
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// Truncating store.
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def STORE_I8_I32 : I<(outs), (ins Int32:$addr, Int32:$val),
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[(truncstorei8 Int32:$val, Int32:$addr)]>;
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def STORE_I16_I32 : I<(outs), (ins Int32:$addr, Int32:$val),
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[(truncstorei16 Int32:$val, Int32:$addr)]>;
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def STORE_I8_I64 : I<(outs), (ins Int32:$addr, Int64:$val),
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[(truncstorei8 Int64:$val, Int32:$addr)]>;
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def STORE_I16_I64 : I<(outs), (ins Int32:$addr, Int64:$val),
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[(truncstorei16 Int64:$val, Int32:$addr)]>;
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def STORE_I32_I64 : I<(outs), (ins Int32:$addr, Int64:$val),
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[(truncstorei32 Int64:$val, Int32:$addr)]>;
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// Page size.
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def page_size_I32 : I<(outs Int32:$dst), (ins),
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[(set Int32:$dst, (int_wasm_page_size))]>,
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Requires<[HasAddr32]>;
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def page_size_I64 : I<(outs Int64:$dst), (ins),
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[(set Int64:$dst, (int_wasm_page_size))]>,
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Requires<[HasAddr64]>;
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