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https://github.com/RPCS3/llvm-mirror.git
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8fce7e82b9
This is a code size win in code that takes offseted addresses frequently, such as C++ constructors that typically need to compute an offseted address of a vtable. It reduces the size of Chromium for Android's .text section by 46KB, or 56KB with ThinLTO (which exposes more opportunities to use a direct access rather than a GOT access). Because the addend range is limited in COFF and Mach-O, this is enabled for ELF only. Differential Revision: https://reviews.llvm.org/D45199 llvm-svn: 329611
123 lines
4.7 KiB
LLVM
123 lines
4.7 KiB
LLVM
; RUN: llc < %s -mtriple=arm64-eabi -mcpu=cyclone | FileCheck %s
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%struct.x = type { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8 }
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@src = external global %struct.x
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@dst = external global %struct.x
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@.str1 = private unnamed_addr constant [31 x i8] c"DHRYSTONE PROGRAM, SOME STRING\00", align 1
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@.str2 = private unnamed_addr constant [36 x i8] c"DHRYSTONE PROGRAM, SOME STRING BLAH\00", align 1
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@.str3 = private unnamed_addr constant [24 x i8] c"DHRYSTONE PROGRAM, SOME\00", align 1
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@.str4 = private unnamed_addr constant [18 x i8] c"DHRYSTONE PROGR \00", align 1
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@.str5 = private unnamed_addr constant [7 x i8] c"DHRYST\00", align 1
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@.str6 = private unnamed_addr constant [14 x i8] c"/tmp/rmXXXXXX\00", align 1
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@spool.splbuf = internal global [512 x i8] zeroinitializer, align 16
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define i32 @t0() {
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entry:
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; CHECK-LABEL: t0:
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; CHECK: ldrb [[REG0:w[0-9]+]], [{{x[0-9]+}}, :lo12:src+10]
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; CHECK: add x[[BASEREG:[0-9]+]], {{x[0-9]+}}, :lo12:src+8
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; CHECK: strb [[REG0]], [{{x[0-9]+}}, :lo12:dst+10]
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; CHECK: ldrh [[REG1:w[0-9]+]], [x[[BASEREG]]]
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; CHECK: add x[[BASEREG2:[0-9]+]], {{x[0-9]+}}, :lo12:dst+8
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; CHECK: strh [[REG1]], [x[[BASEREG2]]]
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; CHECK: ldr [[REG2:x[0-9]+]],
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; CHECK: str [[REG2]],
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call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 8 getelementptr inbounds (%struct.x, %struct.x* @dst, i32 0, i32 0), i8* align 8 getelementptr inbounds (%struct.x, %struct.x* @src, i32 0, i32 0), i32 11, i1 false)
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ret i32 0
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}
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define void @t1(i8* nocapture %C) nounwind {
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entry:
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; CHECK-LABEL: t1:
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; CHECK: add x[[BASEREG:[0-9]+]], {{x[0-9]+}}, :lo12:.L.str1+15
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; CHECK: ldr [[DEST:q[0-9]+]], [x[[BASEREG:[0-9]+]]]
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; CHECK: stur [[DEST]], [x0, #15]
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; CHECK: ldr [[DEST:q[0-9]+]], [x[[BASEREG]]]
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; CHECK: str [[DEST]], [x0]
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tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %C, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str1, i64 0, i64 0), i64 31, i1 false)
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ret void
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}
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define void @t2(i8* nocapture %C) nounwind {
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entry:
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; CHECK-LABEL: t2:
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; CHECK: mov [[REG3:w[0-9]+]]
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; CHECK: movk [[REG3]],
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; CHECK: str [[REG3]], [x0, #32]
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; CHECK: add x[[BASEREG:[0-9]+]], {{x[0-9]+}}, :lo12:.L.str2+16
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; CHECK: ldr [[DEST2:q[0-9]+]], [x[[BASEREG]]]
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; CHECK: add x[[BASEREG:[0-9]+]], {{x[0-9]+}}, :lo12:.L.str2
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; CHECK: ldr [[DEST1:q[0-9]+]], [x[[BASEREG]]]
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; CHECK: stp [[DEST1]], [[DEST2]], [x0]
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tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %C, i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str2, i64 0, i64 0), i64 36, i1 false)
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ret void
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}
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define void @t3(i8* nocapture %C) nounwind {
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entry:
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; CHECK-LABEL: t3:
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; CHECK: add x[[BASEREG:[0-9]+]], {{x[0-9]+}}, :lo12:.L.str3+16
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; CHECK: ldr [[REG4:x[0-9]+]], [x[[BASEREG]]]
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; CHECK: str [[REG4]], [x0, #16]
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; CHECK: add x[[BASEREG:[0-9]+]], {{x[0-9]+}}, :lo12:.L.str3
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; CHECK: ldr [[DEST:q[0-9]+]], [x[[BASEREG]]]
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; CHECK: str [[DEST]], [x0]
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tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %C, i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str3, i64 0, i64 0), i64 24, i1 false)
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ret void
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}
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define void @t4(i8* nocapture %C) nounwind {
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entry:
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; CHECK-LABEL: t4:
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; CHECK: orr [[REG5:w[0-9]+]], wzr, #0x20
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; CHECK: strh [[REG5]], [x0, #16]
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; CHECK: ldr [[REG6:q[0-9]+]], [x{{[0-9]+}}]
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; CHECK: str [[REG6]], [x0]
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tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %C, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str4, i64 0, i64 0), i64 18, i1 false)
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ret void
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}
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define void @t5(i8* nocapture %C) nounwind {
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entry:
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; CHECK-LABEL: t5:
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; CHECK: strb wzr, [x0, #6]
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; CHECK: mov [[REG7:w[0-9]+]], #21587
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; CHECK: strh [[REG7]], [x0, #4]
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; CHECK: mov [[REG8:w[0-9]+]],
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; CHECK: movk [[REG8]],
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; CHECK: str [[REG8]], [x0]
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tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %C, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str5, i64 0, i64 0), i64 7, i1 false)
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ret void
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}
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define void @t6() nounwind {
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entry:
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; CHECK-LABEL: t6:
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; CHECK: add x[[BASEREG:[0-9]+]], {{x[0-9]+}}, :lo12:.L.str6+6
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; CHECK: ldr [[REG9:x[0-9]+]], [x[[BASEREG]]]
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; CHECK: add x[[BASEREG:[0-9]+]], {{x[0-9]+}}, :lo12:spool.splbuf+6
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; CHECK: str [[REG9]], [x[[BASEREG]]]
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; CHECK: ldr
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; CHECK: str
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call void @llvm.memcpy.p0i8.p0i8.i64(i8* getelementptr inbounds ([512 x i8], [512 x i8]* @spool.splbuf, i64 0, i64 0), i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str6, i64 0, i64 0), i64 14, i1 false)
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ret void
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}
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%struct.Foo = type { i32, i32, i32, i32 }
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define void @t7(%struct.Foo* nocapture %a, %struct.Foo* nocapture %b) nounwind {
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entry:
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; CHECK: t7
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; CHECK: ldr [[REG10:q[0-9]+]], [x1]
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; CHECK: str [[REG10]], [x0]
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%0 = bitcast %struct.Foo* %a to i8*
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%1 = bitcast %struct.Foo* %b to i8*
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tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %0, i8* align 4 %1, i32 16, i1 false)
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ret void
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}
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declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i1) nounwind
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declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i1) nounwind
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