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1c1cc1c5ed
As announced here: http://lists.llvm.org/pipermail/llvm-dev/2019-April/131786.html Grouped option syntax (POSIX Utility Conventions) does not play well with -long-option A subsequent change will reject -long-option.
110 lines
2.3 KiB
ArmAsm
110 lines
2.3 KiB
ArmAsm
@ RUN: llvm-mc -triple thumbv7-windows-itanium -filetype obj -o - %s \
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@ RUN: | llvm-readobj -r - | FileCheck %s -check-prefix CHECK-RELOCATION
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@ RUN: llvm-mc -triple thumbv7-windows-itanium -filetype obj -o - %s \
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@ RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-ENCODING
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.syntax unified
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.text
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.thumb
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.global target
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.thumb_func
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branch24t_0:
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b target
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@ CHECK-ENCODING-LABEL: <branch24t_0>:
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@ CHECK-ENCODING-NEXT: b.w #0
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.thumb_func
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branch24t_1:
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bl target
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@ CHECK-ENCODING-LABEL: <branch24t_1>:
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@ CHECK-ENCODING-NEXR: bl #0
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.thumb_func
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branch20t:
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bcc target
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@ CHECK-ENCODING-LABEL: <branch20t>:
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@ CHECK-ENCODING-NEXT: blo.w #0
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.thumb_func
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blx23t:
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blx target
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@ CHECK-ENCODING-LABEL: <blx23t>:
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@ CHECK-ENCODING-NEXT: blx #0
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.thumb_func
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mov32t:
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movw r0, :lower16:target
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movt r0, :upper16:target
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blx r0
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@ CHECK-ENCODING-LABEL: <mov32t>:
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@ CHECK-ENCODING-NEXT: movw r0, #0
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@ CHECK-ENCODING-NEXT: movt r0, #0
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@ CHECK-ENCODING-NEXT: blx r0
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.thumb_func
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addr32:
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ldr r0, .Laddr32
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bx r0
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trap
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.Laddr32:
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.long target
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@ CHECK-ENCODING-LABEL: <addr32>:
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@ CHECK-ENCODING-NEXT: ldr r0, [pc, #4]
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@ CHECK-ENCODING-NEXT: bx r0
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@ CHECK-ENCODING-NEXT: trap
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@ CHECK-ENCODING-NEXT: movs r0, r0
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@ CHECK-ENCODING-NEXT: movs r0, r0
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.thumb_func
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addr32nb:
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ldr r0, .Laddr32nb
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bx r0
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trap
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.Laddr32nb:
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.long target(imgrel)
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@ CHECK-ENCODING-LABEL: <addr32nb>:
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@ CHECK-ENCODING-NEXT: ldr.w r0, [pc, #4]
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@ CHECK-ENCODING-NEXT: bx r0
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@ CHECK-ENCODING-NEXT: trap
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@ CHECK-ENCODING-NEXT: movs r0, r0
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@ CHECK-ENCODING-NEXT: movs r0, r0
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.thumb_func
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secrel:
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ldr r0, .Lsecrel
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bx r0
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trap
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.Lsecrel:
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.long target(secrel32)
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@ CHECK-ENCODING-LABEL: <secrel>:
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@ CHECK-ENCODING-NEXT: ldr.w r0, [pc, #4]
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@ CHECK-ENCODING-NEXT: bx r0
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@ CHECK-ENCODING-NEXT: trap
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@ CHECK-ENCODING-NEXT: movs r0, r0
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@ CHECK-ENCODING-NEXT: movs r0, r0
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@ CHECK-RELOCATION: Relocations [
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@ CHECK-RELOCATION: Section (1) .text {
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@ CHECK-RELOCATION: 0x0 IMAGE_REL_ARM_BRANCH24T
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@ CHECK-RELOCATION: 0x4 IMAGE_REL_ARM_BRANCH24T
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@ CHECK-RELOCATION: 0x8 IMAGE_REL_ARM_BRANCH20T
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@ CHECK-RELOCATION: 0xC IMAGE_REL_ARM_BLX23T
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@ CHECK-RELOCATION: 0x10 IMAGE_REL_ARM_MOV32T
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@ CHECK-RELOCATION: 0x20 IMAGE_REL_ARM_ADDR32
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@ CHECK-RELOCATION: 0x2C IMAGE_REL_ARM_ADDR32NB
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@ CHECK-RELOCATION: 0x38 IMAGE_REL_ARM_SECREL
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@ CHECK-RELOCATION: }
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@ CHECK-RELOCATION: ]
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