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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-30 15:32:52 +01:00
llvm-mirror/lib/Target
Duraid Madina e7412561bf fix bogus division-by-power-of-2 (was wrong for negative input, adds extr insn)
fix hack in division (clean up frcpa instruction)

llvm-svn: 21153
2005-04-08 10:01:48 +00:00
..
Alpha Alpha zero extends setcc results 2005-04-07 20:11:32 +00:00
CBackend Fix the 3 regressions last night, due to my buggy patch from yesterday. 2005-03-19 17:35:11 +00:00
IA64 fix bogus division-by-power-of-2 (was wrong for negative input, adds extr insn) 2005-04-08 10:01:48 +00:00
PowerPC Optimized code sequences for setcc reg, 0 2005-04-07 20:30:01 +00:00
Skeleton ignore generated files 2004-11-21 00:01:54 +00:00
SparcV8 This mega patch converts us from using Function::a{iterator|begin|end} to 2005-03-15 04:54:21 +00:00
SparcV9 Fix a namespace issue, reported by Vladimir Merzliakov! 2005-04-06 19:45:39 +00:00
X86 X86 zero extends setcc results 2005-04-07 19:41:46 +00:00
Makefile build the IA64 target as a .so for now 2005-03-17 18:29:04 +00:00
MRegisterInfo.cpp Move destructor out of line to avoid vtable emission in every file that includes the header. Thanks to sabre. 2004-10-27 06:00:53 +00:00
Target.td Add some bits that can be set for instructions. 2005-01-02 02:27:48 +00:00
TargetData.cpp add a StructLayout::getElementContainingOffset method. 2005-03-13 19:04:41 +00:00
TargetFrameInfo.cpp Fix compilation errors with VS 2005, patch contributed by Aaron Gray. 2005-02-17 21:40:27 +00:00
TargetInstrInfo.cpp Finegrainify namespacification 2005-01-19 06:53:34 +00:00
TargetLowering.cpp Add a hook to find out how the target handles shift amounts that are out of 2005-01-19 03:36:14 +00:00
TargetMachine.cpp Add a new target-independent code generator flag. 2005-01-15 06:00:32 +00:00
TargetMachineRegistry.cpp Implement TargetRegistrationListener 2004-07-11 06:03:21 +00:00
TargetSchedInfo.cpp Improve compatiblity with HPUX on Itanium, patch by Duraid Madina 2005-01-16 01:31:31 +00:00