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caf90336a9
Summary: r250697 fixed the mapping for ARM mode. We have to do the same for Thumb2 otherwise the same llvm.arm.ssat() will generate different saturating amount for ARM and Thumb. r250697: http://reviews.llvm.org/rL250697 Reviewers: rmaprath Subscribers: aemerson, llvm-commits, rengolin Differential Revision: http://reviews.llvm.org/D15653 llvm-svn: 256115
64 lines
1.9 KiB
LLVM
64 lines
1.9 KiB
LLVM
; RUN: llc -O1 -mtriple=armv6-none-none-eabi %s -o - | FileCheck %s -check-prefix=ARM -check-prefix=CHECK
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; RUN: llc -O1 -mtriple=thumbv7-none-none-eabi %s -o - | FileCheck %s -check-prefix=THUMB -check-prefix=CHECK
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; CHECK-LABEL: qadd
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define i32 @qadd() nounwind {
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; CHECK-DAG: mov{{s?}} [[R0:.*]], #8
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; CHECK-DAG: mov{{s?}} [[R1:.*]], #128
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; CHECK-ARM: qadd [[R0]], [[R1]], [[R0]]
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; CHECK-THRUMB: qadd [[R0]], [[R0]], [[R1]]
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%tmp = call i32 @llvm.arm.qadd(i32 128, i32 8)
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ret i32 %tmp
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}
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; CHECK-LABEL: qsub
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define i32 @qsub() nounwind {
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; CHECK-DAG: mov{{s?}} [[R0:.*]], #8
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; CHECK-DAG: mov{{s?}} [[R1:.*]], #128
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; CHECK-ARM: qsub [[R0]], [[R1]], [[R0]]
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; CHECK-THRUMB: qadd [[R0]], [[R1]], [[R0]]
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%tmp = call i32 @llvm.arm.qsub(i32 128, i32 8)
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ret i32 %tmp
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}
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; upper-bound of the immediate argument
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; CHECK-LABEL: ssat1
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define i32 @ssat1() nounwind {
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; CHECK: mov{{s?}} [[R0:.*]], #128
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; CHECK: ssat [[R1:.*]], #32, [[R0]]
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%tmp = call i32 @llvm.arm.ssat(i32 128, i32 32)
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ret i32 %tmp
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}
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; lower-bound of the immediate argument
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; CHECK-LABEL: ssat2
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define i32 @ssat2() nounwind {
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; CHECK: mov{{s?}} [[R0:.*]], #128
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; CHECK: ssat [[R1:.*]], #1, [[R0]]
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%tmp = call i32 @llvm.arm.ssat(i32 128, i32 1)
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ret i32 %tmp
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}
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; upper-bound of the immediate argument
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; CHECK-LABEL: usat1
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define i32 @usat1() nounwind {
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; CHECK: mov{{s?}} [[R0:.*]], #128
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; CHECK: usat [[R1:.*]], #31, [[R0]]
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%tmp = call i32 @llvm.arm.usat(i32 128, i32 31)
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ret i32 %tmp
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}
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; lower-bound of the immediate argument
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; CHECK-LABEL: usat2
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define i32 @usat2() nounwind {
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; CHECK: mov{{s?}} [[R0:.*]], #128
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; CHECK: usat [[R1:.*]], #0, [[R0]]
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%tmp = call i32 @llvm.arm.usat(i32 128, i32 0)
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ret i32 %tmp
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}
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declare i32 @llvm.arm.qadd(i32, i32) nounwind
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declare i32 @llvm.arm.qsub(i32, i32) nounwind
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declare i32 @llvm.arm.ssat(i32, i32) nounwind readnone
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declare i32 @llvm.arm.usat(i32, i32) nounwind readnone
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