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a7a6cff7db
This pattern shows up when lowering byval copies on AMDGPU. The byval object access is split into 4-byte chunks, adding a constant offset to the FixedStack base. When some of the offsets turn into ors, this prevents combining the constant offsets. This makes it not apparent that the object is there when matching addressing modes, so it ends up using a scratch wave offset relative access and the lengthy frame index expansion for that. llvm-svn: 309775
69 lines
3.4 KiB
LLVM
69 lines
3.4 KiB
LLVM
; RUN: not llc < %s -march=bpfel | FileCheck -check-prefixes=CHECK,EL %s
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; RUN: not llc < %s -march=bpfeb | FileCheck -check-prefixes=CHECK,EB %s
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%struct.bpf_map_def = type { i32, i32, i32, i32 }
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%struct.__sk_buff = type opaque
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%struct.routing_key_2 = type { [6 x i8] }
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@routing = global %struct.bpf_map_def { i32 1, i32 6, i32 12, i32 1024 }, section "maps", align 4
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@routing_miss_0 = global %struct.bpf_map_def { i32 1, i32 1, i32 12, i32 1 }, section "maps", align 4
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@test1 = global %struct.bpf_map_def { i32 2, i32 4, i32 8, i32 1024 }, section "maps", align 4
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@test1_miss_4 = global %struct.bpf_map_def { i32 2, i32 1, i32 8, i32 1 }, section "maps", align 4
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@_license = global [4 x i8] c"GPL\00", section "license", align 1
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@llvm.used = appending global [6 x i8*] [i8* getelementptr inbounds ([4 x i8], [4 x i8]* @_license, i32 0, i32 0), i8* bitcast (i32 (%struct.__sk_buff*)* @ebpf_filter to i8*), i8* bitcast (%struct.bpf_map_def* @routing to i8*), i8* bitcast (%struct.bpf_map_def* @routing_miss_0 to i8*), i8* bitcast (%struct.bpf_map_def* @test1 to i8*), i8* bitcast (%struct.bpf_map_def* @test1_miss_4 to i8*)], section "llvm.metadata"
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; Function Attrs: nounwind uwtable
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define i32 @ebpf_filter(%struct.__sk_buff* nocapture readnone %ebpf_packet) #0 section "socket1" {
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; EL: r1 = 134678021
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; EB: r1 = 84281096
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; CHECK: *(u32 *)(r10 - 8) = r1
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; EL: r1 = 2569
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; EB: r1 = 2314
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; CHECK: *(u16 *)(r10 - 4) = r1
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; CHECK: r1 = 0
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; CHECK: *(u16 *)(r10 + 24) = r1
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; CHECK: *(u16 *)(r10 + 22) = r1
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; CHECK: *(u16 *)(r10 + 20) = r1
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; CHECK: *(u16 *)(r10 + 18) = r1
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; CHECK: *(u16 *)(r10 + 16) = r1
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; CHECK: *(u16 *)(r10 + 14) = r1
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; CHECK: *(u16 *)(r10 + 12) = r1
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; CHECK: *(u16 *)(r10 + 10) = r1
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; CHECK: *(u16 *)(r10 + 8) = r1
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; CHECK: *(u16 *)(r10 + 6) = r1
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; CHECK: *(u16 *)(r10 + 4) = r1
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; CHECK: *(u16 *)(r10 + 2) = r1
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; CHECK: *(u16 *)(r10 + 0) = r1
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; CHECK: *(u16 *)(r10 - 2) = r1
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; CHECK: *(u16 *)(r10 + 26) = r1
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; CHECK: r2 = r10
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; CHECK: r2 += -8
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; CHECK: r1 = <MCOperand Expr:(routing)>ll
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; CHECK: call bpf_map_lookup_elem
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; CHECK: exit
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%key = alloca %struct.routing_key_2, align 1
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%1 = getelementptr inbounds %struct.routing_key_2, %struct.routing_key_2* %key, i64 0, i32 0, i64 0
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store i8 5, i8* %1, align 1
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%2 = getelementptr inbounds %struct.routing_key_2, %struct.routing_key_2* %key, i64 0, i32 0, i64 1
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store i8 6, i8* %2, align 1
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%3 = getelementptr inbounds %struct.routing_key_2, %struct.routing_key_2* %key, i64 0, i32 0, i64 2
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store i8 7, i8* %3, align 1
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%4 = getelementptr inbounds %struct.routing_key_2, %struct.routing_key_2* %key, i64 0, i32 0, i64 3
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store i8 8, i8* %4, align 1
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%5 = getelementptr inbounds %struct.routing_key_2, %struct.routing_key_2* %key, i64 0, i32 0, i64 4
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store i8 9, i8* %5, align 1
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%6 = getelementptr inbounds %struct.routing_key_2, %struct.routing_key_2* %key, i64 0, i32 0, i64 5
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store i8 10, i8* %6, align 1
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%7 = getelementptr inbounds %struct.routing_key_2, %struct.routing_key_2* %key, i64 1, i32 0, i64 0
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call void @llvm.memset.p0i8.i64(i8* %7, i8 0, i64 30, i32 1, i1 false)
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%8 = call i32 (%struct.bpf_map_def*, %struct.routing_key_2*, ...) bitcast (i32 (...)* @bpf_map_lookup_elem to i32 (%struct.bpf_map_def*, %struct.routing_key_2*, ...)*)(%struct.bpf_map_def* nonnull @routing, %struct.routing_key_2* nonnull %key) #3
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ret i32 undef
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}
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; Function Attrs: nounwind argmemonly
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declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) #1
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declare i32 @bpf_map_lookup_elem(...) #2
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