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f0232a2a7f
of its strings when expanding the string literals from the macros, and push all of the APIs to be StringRef instead of C-string APIs. This (remarkably) removes a very non-trivial number of strlen calls. It even deletes code and complexity from one of the primary users -- Clang. llvm-svn: 246374
136 lines
3.9 KiB
C++
136 lines
3.9 KiB
C++
//===-- TargetParser - Parser for target features ---------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements a target parser to recognise hardware features such as
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// FPU/CPU/ARCH names as well as specific support such as HDIV, etc.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_SUPPORT_TARGETPARSER_H
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#define LLVM_SUPPORT_TARGETPARSER_H
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// FIXME: vector is used because that's what clang uses for subtarget feature
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// lists, but SmallVector would probably be better
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#include <vector>
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namespace llvm {
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class StringRef;
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// Target specific information into their own namespaces. These should be
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// generated from TableGen because the information is already there, and there
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// is where new information about targets will be added.
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// FIXME: To TableGen this we need to make some table generated files available
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// even if the back-end is not compiled with LLVM, plus we need to create a new
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// back-end to TableGen to create these clean tables.
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namespace ARM {
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// FPU names.
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enum FPUKind {
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#define ARM_FPU(NAME, KIND, VERSION, NEON_SUPPORT, RESTRICTION) KIND,
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#include "ARMTargetParser.def"
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FK_LAST
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};
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// FPU Version
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enum FPUVersion {
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FV_NONE = 0,
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FV_VFPV2,
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FV_VFPV3,
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FV_VFPV3_FP16,
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FV_VFPV4,
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FV_VFPV5
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};
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// An FPU name implies one of three levels of Neon support:
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enum NeonSupportLevel {
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NS_None = 0, ///< No Neon
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NS_Neon, ///< Neon
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NS_Crypto ///< Neon with Crypto
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};
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// An FPU name restricts the FPU in one of three ways:
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enum FPURestriction {
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FR_None = 0, ///< No restriction
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FR_D16, ///< Only 16 D registers
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FR_SP_D16 ///< Only single-precision instructions, with 16 D registers
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};
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// Arch names.
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enum ArchKind {
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#define ARM_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR) ID,
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#include "ARMTargetParser.def"
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AK_LAST
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};
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// Arch extension modifiers for CPUs.
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enum ArchExtKind : unsigned {
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AEK_INVALID = 0x0,
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AEK_NONE = 0x1,
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AEK_CRC = 0x2,
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AEK_CRYPTO = 0x4,
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AEK_FP = 0x8,
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AEK_HWDIV = 0x10,
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AEK_HWDIVARM = 0x20,
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AEK_MP = 0x40,
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AEK_SIMD = 0x80,
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AEK_SEC = 0x100,
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AEK_VIRT = 0x200,
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// Unsupported extensions.
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AEK_OS = 0x8000000,
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AEK_IWMMXT = 0x10000000,
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AEK_IWMMXT2 = 0x20000000,
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AEK_MAVERICK = 0x40000000,
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AEK_XSCALE = 0x80000000,
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};
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// ISA kinds.
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enum ISAKind { IK_INVALID = 0, IK_ARM, IK_THUMB, IK_AARCH64 };
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// Endianness
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// FIXME: BE8 vs. BE32?
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enum EndianKind { EK_INVALID = 0, EK_LITTLE, EK_BIG };
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// v6/v7/v8 Profile
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enum ProfileKind { PK_INVALID = 0, PK_A, PK_R, PK_M };
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StringRef getCanonicalArchName(StringRef Arch);
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// Information by ID
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StringRef getFPUName(unsigned FPUKind);
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unsigned getFPUVersion(unsigned FPUKind);
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unsigned getFPUNeonSupportLevel(unsigned FPUKind);
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unsigned getFPURestriction(unsigned FPUKind);
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unsigned getDefaultFPU(StringRef CPU);
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// FIXME: This should be moved to TargetTuple once it exists
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bool getFPUFeatures(unsigned FPUKind, std::vector<const char *> &Features);
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bool getHWDivFeatures(unsigned HWDivKind, std::vector<const char *> &Features);
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StringRef getArchName(unsigned ArchKind);
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unsigned getArchAttr(unsigned ArchKind);
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StringRef getCPUAttr(unsigned ArchKind);
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StringRef getSubArch(unsigned ArchKind);
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StringRef getArchExtName(unsigned ArchExtKind);
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StringRef getHWDivName(unsigned HWDivKind);
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StringRef getDefaultCPU(StringRef Arch);
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// Parser
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unsigned parseHWDiv(StringRef HWDiv);
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unsigned parseFPU(StringRef FPU);
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unsigned parseArch(StringRef Arch);
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unsigned parseArchExt(StringRef ArchExt);
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unsigned parseCPUArch(StringRef CPU);
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unsigned parseArchISA(StringRef Arch);
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unsigned parseArchEndian(StringRef Arch);
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unsigned parseArchProfile(StringRef Arch);
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unsigned parseArchVersion(StringRef Arch);
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} // namespace ARM
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} // namespace llvm
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#endif
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