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68c567a38a
The syntax for "cmpxchg" should now look something like: cmpxchg i32* %addr, i32 42, i32 3 acquire monotonic where the second ordering argument gives the required semantics in the case that no exchange takes place. It should be no stronger than the first ordering constraint and cannot be either "release" or "acq_rel" (since no store will have taken place). rdar://problem/15996804 llvm-svn: 203559
27 lines
883 B
LLVM
27 lines
883 B
LLVM
; RUN: llc < %s -march=x86 -mtriple=i386-apple-darwin | FileCheck %s
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; PR8297
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;
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; On i386, i64 cmpxchg is lowered during legalize types to extract the
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; 64-bit result into a pair of fixed regs. So creation of the DAG node
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; happens in a different place. See
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; X86TargetLowering::ReplaceNodeResults, case ATOMIC_CMP_SWAP.
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;
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; Neither Atomic-xx.ll nor atomic_op.ll cover this. Those tests were
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; autogenerated from C source before 64-bit variants were supported.
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;
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; Note that this case requires a loop around the cmpxchg to force
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; machine licm to query alias anlysis, exposing a bad
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; MachineMemOperand.
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define void @foo(i64* %ptr) nounwind inlinehint {
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entry:
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br label %loop
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loop:
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; CHECK: lock
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; CHECK-NEXT: cmpxchg8b
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%r = cmpxchg i64* %ptr, i64 0, i64 1 monotonic monotonic
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%stored1 = icmp eq i64 %r, 0
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br i1 %stored1, label %loop, label %continue
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continue:
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ret void
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}
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