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https://github.com/RPCS3/llvm-mirror.git
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a8dd5128cf
Splitting a loop to make range checks redundant is profitable only if the range check "never" fails. Make this fact a part of recognizing a range check -- a branch is a range check only if it is expected to pass (via branch_weights metadata). Differential Revision: http://reviews.llvm.org/D7192 llvm-svn: 227249
112 lines
3.7 KiB
LLVM
112 lines
3.7 KiB
LLVM
; RUN: opt -irce -S < %s | FileCheck %s
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define void @single_access_no_preloop_no_offset(i32 *%arr, i32 *%a_len_ptr, i32 %n) {
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entry:
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%len = load i32* %a_len_ptr, !range !0
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%first.itr.check = icmp sgt i32 %n, 0
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br i1 %first.itr.check, label %loop, label %exit
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loop:
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%idx = phi i32 [ 0, %entry ] , [ %idx.next, %in.bounds ]
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%idx.next = add i32 %idx, 1
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%abc = icmp slt i32 %idx, %len
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br i1 %abc, label %in.bounds, label %out.of.bounds, !prof !1
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in.bounds:
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%addr = getelementptr i32* %arr, i32 %idx
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store i32 0, i32* %addr
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%next = icmp slt i32 %idx.next, %n
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br i1 %next, label %loop, label %exit
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out.of.bounds:
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ret void
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exit:
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ret void
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}
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; CHECK-LABEL: single_access_no_preloop
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; CHECK-LABEL: loop:
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; CHECK: br i1 true, label %in.bounds, label %out.of.bounds
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; CHECK-LABEL: main.exit.selector:
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; CHECK-NEXT: [[continue:%[^ ]+]] = icmp slt i32 %idx.next, %n
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; CHECK-NEXT: br i1 [[continue]], label %main.pseudo.exit, label %exit.loopexit
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; CHECK-LABEL: main.pseudo.exit:
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; CHECK-NEXT: %idx.copy = phi i32 [ 0, %loop.preheader ], [ %idx.next, %main.exit.selector ]
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; CHECK-NEXT: br label %postloop
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; CHECK-LABEL: postloop:
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; CHECK-NEXT: br label %loop.postloop
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; CHECK-LABEL: loop.postloop:
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; CHECK-NEXT: %idx.postloop = phi i32 [ %idx.next.postloop, %in.bounds.postloop ], [ %idx.copy, %postloop ]
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; CHECK-NEXT: %idx.next.postloop = add i32 %idx.postloop, 1
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; CHECK-NEXT: %abc.postloop = icmp slt i32 %idx.postloop, %len
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; CHECK-NEXT: br i1 %abc.postloop, label %in.bounds.postloop, label %out.of.bounds
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; CHECK-LABEL: in.bounds.postloop:
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; CHECK-NEXT: %addr.postloop = getelementptr i32* %arr, i32 %idx.postloop
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; CHECK-NEXT: store i32 0, i32* %addr.postloop
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; CHECK-NEXT: %next.postloop = icmp slt i32 %idx.next.postloop, %n
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; CHECK-NEXT: br i1 %next.postloop, label %loop.postloop, label %exit.loopexit
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define void @single_access_no_preloop_with_offset(i32 *%arr, i32 *%a_len_ptr, i32 %n) {
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entry:
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%len = load i32* %a_len_ptr, !range !0
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%first.itr.check = icmp sgt i32 %n, 0
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br i1 %first.itr.check, label %loop, label %exit
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loop:
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%idx = phi i32 [ 0, %entry ] , [ %idx.next, %in.bounds ]
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%idx.next = add i32 %idx, 1
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%idx.for.abc = add i32 %idx, 4
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%abc = icmp slt i32 %idx.for.abc, %len
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br i1 %abc, label %in.bounds, label %out.of.bounds, !prof !1
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in.bounds:
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%addr = getelementptr i32* %arr, i32 %idx.for.abc
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store i32 0, i32* %addr
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%next = icmp slt i32 %idx.next, %n
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br i1 %next, label %loop, label %exit
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out.of.bounds:
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ret void
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exit:
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ret void
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}
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; CHECK-LABEL: single_access_no_preloop_with_offset
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; CHECK-LABEL: loop.preheader:
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; CHECK: [[safe_range_end:[^ ]+]] = sub i32 %len, 4
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; CHECK: [[exit_main_loop_at_cmp:[^ ]+]] = icmp slt i32 %n, [[safe_range_end]]
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; CHECK: [[exit_main_loop_at:[^ ]+]] = select i1 [[exit_main_loop_at_cmp]], i32 %n, i32 [[safe_range_end]]
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; CHECK: [[enter_main_loop:[^ ]+]] = icmp slt i32 0, [[exit_main_loop_at]]
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; CHECK: br i1 [[enter_main_loop]], label %loop, label %main.pseudo.exit
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; CHECK-LABEL: loop:
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; CHECK: br i1 true, label %in.bounds, label %out.of.bounds
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; CHECK-LABEL: in.bounds:
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; CHECK: [[continue_main_loop:[^ ]+]] = icmp slt i32 %idx.next, [[exit_main_loop_at]]
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; CHECK: br i1 [[continue_main_loop]], label %loop, label %main.exit.selector
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; CHECK-LABEL: main.pseudo.exit:
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; CHECK: %idx.copy = phi i32 [ 0, %loop.preheader ], [ %idx.next, %main.exit.selector ]
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; CHECK: br label %postloop
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; CHECK-LABEL: loop.postloop:
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; CHECK: %idx.postloop = phi i32 [ %idx.next.postloop, %in.bounds.postloop ], [ %idx.copy, %postloop ]
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; CHECK-LABEL: in.bounds.postloop:
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; CHECK: %next.postloop = icmp slt i32 %idx.next.postloop, %n
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; CHECK: br i1 %next.postloop, label %loop.postloop, label %exit.loopexit
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!0 = !{i32 0, i32 2147483647}
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!1 = !{!"branch_weights", i32 64, i32 4}
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