Vikram S. Adve a8f8fd19c0 Don't assume constant operand can only be in position 1! ... llvm-svn: 1308		2001-11-14 18:49:45 +00:00
..
InstrSched	Eliminate most uses of the machine instruction vector for each LLVM instr,	2001-11-12 18:53:43 +00:00
InstrSelection	Don't assume constant operand can only be in position 1!	2001-11-14 18:49:45 +00:00
RegAlloc	Added support method for setting interference for pseudo instructions	2001-11-14 15:37:13 +00:00
MachineInstr.cpp	Bug fix in offset alignment computations: don't subtract the padding	2001-11-12 23:26:23 +00:00
Makefile	added RegAlloc Directory to DIRS	2001-09-14 21:28:17 +00:00