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llvm-mirror/test
Alex Bradbury a97047278a [DWARF][RISCV] Add support for RISC-V relocations needed for debug info
When code relaxation is enabled many RISC-V fixups are not resolved but
instead relocations are emitted. This happens even for DWARF debug
sections. Therefore, to properly support the parsing of DWARF debug info
we need to be able to resolve RISC-V relocations. This patch adds:

* Support for RISC-V relocations in RelocationResolver
* DWARF support for two relocations per object file offset
* DWARF changes to support relocations in more DIE fields

The two relocations per offset change is needed because some RISC-V
relocations (used for label differences) come in pairs.

Relocations can also be emitted for DWARF fields where relocations were
not yet evaluated. Adding relocation support for some of these fields is
essencial. On the other hand, LLVM currently emits RISC-V relocations
for fixups that could be safely evaluated, since they can never be
affected by code relaxations. This patch also adds relocation support
for the fields affected by those extraneous relocations (the DWARF unit
entry Length, and the DWARF debug line entry TotalLength and
PrologueLength), for testing purposes.

Differential Revision: https://reviews.llvm.org/D62062
Patch by Luís Marques.

llvm-svn: 366402
2019-07-18 05:22:55 +00:00
..
Analysis Basic codegen for MTE stack tagging. 2019-07-17 19:24:02 +00:00
Assembler
Bindings
Bitcode
BugPoint
CodeGen [Tests] Add a test showing how we handle overaligned allocas w/ no-realign-stack 2019-07-18 00:26:03 +00:00
DebugInfo [DWARF][RISCV] Add support for RISC-V relocations needed for debug info 2019-07-18 05:22:55 +00:00
Demangle
Examples
ExecutionEngine
Feature
FileCheck
Instrumentation hwasan: Initialize the pass only once. 2019-07-17 21:45:19 +00:00
Integer
JitListener
Linker
LTO
MachineVerifier
MC Revert [AArch64] Add support for Transactional Memory Extension (TME) 2019-07-17 17:43:32 +00:00
Object
ObjectYAML
Other
SafepointIRVerifier
Support
SymbolRewriter
TableGen [TableGen] Do not set ReadNone attribute on intrinsics with side effects 2019-07-17 10:53:13 +00:00
ThinLTO/X86
tools llvm-pdbdump: Fix several smaller issues with injected source compression handling 2019-07-17 22:59:52 +00:00
Transforms [AMDGPU] Tune inlining parameters for AMDGPU target 2019-07-17 16:51:29 +00:00
Unit
Verifier ARM: Fix missing immarg for space intrinsic 2019-07-16 22:41:38 +00:00
YAMLParser
.clang-format
CMakeLists.txt
lit.cfg.py
lit.site.cfg.py.in
TestRunner.sh