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344bd94c69
Fixes an assertion: llc: lib/CodeGen/SelectionDAG/SelectionDAG.cpp:2200: llvm::KnownBits llvm::SelectionDAG::computeKnownBits(llvm::SDValue, const llvm::APInt&, unsigned int) const: Assertion `(!Op.getValueType().isVector() || NumElts == Op.getValueType().getVectorNumElements()) && "Unexpected vector size"' failed. Committed on behalf of: @pendingchaos (Rhys Perry) Differential Revision: https://reviews.llvm.org/D55223 llvm-svn: 348574
12 lines
378 B
LLVM
12 lines
378 B
LLVM
; RUN: llc -march=amdgcn -mcpu=gfx802 -verify-machineinstrs < %s | FileCheck %s
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; CHECK: s_waitcnt
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define <2 x i16> @main(<2 x float>) #0 {
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%2 = bitcast <2 x float> %0 to <4 x i16>
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%3 = shufflevector <4 x i16> %2, <4 x i16> undef, <2 x i32> <i32 0, i32 undef>
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%4 = extractelement <4 x i16> %2, i32 0
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%5 = insertelement <2 x i16> %3, i16 %4, i32 0
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ret <2 x i16> %5
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}
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