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2405f803ac
Continue to present HSA metadata as YAML in ASM and when output by tools (e.g. llvm-readobj), but encode it in Messagepack in the code object. Differential Revision: https://reviews.llvm.org/D48179 llvm-svn: 348963
102 lines
3.9 KiB
LLVM
102 lines
3.9 KiB
LLVM
; RUN: llc -mattr=+code-object-v3 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -filetype=obj -o - < %s | llvm-readobj -elf-output-style=GNU -notes | FileCheck --check-prefix=CHECK --check-prefix=GFX900 --check-prefix=NOTES %s
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; RUN: llc -mattr=+code-object-v3 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -amdgpu-dump-hsa-metadata -amdgpu-verify-hsa-metadata -filetype=obj -o - < %s 2>&1 | FileCheck --check-prefix=PARSER %s
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; CHECK: ---
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; CHECK: amdhsa.kernels:
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; CHECK: .symbol: test_non_enqueue_kernel_caller.kd
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; CHECK: .name: test_non_enqueue_kernel_caller
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; CHECK: .language: OpenCL C
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; CHECK: .language_version:
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; CHECK-NEXT: - 2
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; CHECK-NEXT: - 0
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; CHECK: .args:
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; CHECK-NEXT: - .type_name: char
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; CHECK-NEXT: .value_kind: by_value
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; CHECK-NEXT: .offset: 0
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; CHECK-NEXT: .size: 1
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; CHECK-NEXT: .value_type: i8
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; CHECK-NEXT: .name: a
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; CHECK-NEXT: - .value_kind: hidden_global_offset_x
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; CHECK-NEXT: .offset: 8
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; CHECK-NEXT: .size: 8
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; CHECK-NEXT: .value_type: i64
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; CHECK-NEXT: - .value_kind: hidden_global_offset_y
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; CHECK-NEXT: .offset: 16
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; CHECK-NEXT: .size: 8
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; CHECK-NEXT: .value_type: i64
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; CHECK-NEXT: - .value_kind: hidden_global_offset_z
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; CHECK-NEXT: .offset: 24
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; CHECK-NEXT: .size: 8
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; CHECK-NEXT: .value_type: i64
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; CHECK-NOT: .value_kind: hidden_default_queue
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; CHECK-NOT: .value_kind: hidden_completion_action
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define amdgpu_kernel void @test_non_enqueue_kernel_caller(i8 %a)
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!kernel_arg_addr_space !1 !kernel_arg_access_qual !2 !kernel_arg_type !3
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!kernel_arg_base_type !3 !kernel_arg_type_qual !4 {
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ret void
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}
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; CHECK: .symbol: test_enqueue_kernel_caller.kd
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; CHECK: .name: test_enqueue_kernel_caller
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; CHECK: .language: OpenCL C
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; CHECK: .language_version:
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; CHECK-NEXT: - 2
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; CHECK-NEXT: - 0
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; CHECK: .args:
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; CHECK-NEXT: - .type_name: char
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; CHECK-NEXT: .value_kind: by_value
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; CHECK-NEXT: .offset: 0
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; CHECK-NEXT: .size: 1
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; CHECK-NEXT: .value_type: i8
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; CHECK-NEXT: .name: a
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; CHECK-NEXT: - .value_kind: hidden_global_offset_x
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; CHECK-NEXT: .offset: 8
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; CHECK-NEXT: .size: 8
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; CHECK-NEXT: .value_type: i64
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; CHECK-NEXT: - .value_kind: hidden_global_offset_y
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; CHECK-NEXT: .offset: 16
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; CHECK-NEXT: .size: 8
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; CHECK-NEXT: .value_type: i64
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; CHECK-NEXT: - .value_kind: hidden_global_offset_z
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; CHECK-NEXT: .offset: 24
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; CHECK-NEXT: .size: 8
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; CHECK-NEXT: .value_type: i64
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; CHECK-NEXT: - .value_kind: hidden_none
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; CHECK-NEXT: .offset: 32
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; CHECK-NEXT: .size: 8
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; CHECK-NEXT: .value_type: i8
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; CHECK-NEXT: .address_space: global
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; CHECK-NEXT: - .value_kind: hidden_default_queue
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; CHECK-NEXT: .offset: 40
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; CHECK-NEXT: .size: 8
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; CHECK-NEXT: .value_type: i8
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; CHECK-NEXT: .address_space: global
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; CHECK-NEXT: - .value_kind: hidden_completion_action
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; CHECK-NEXT: .offset: 48
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; CHECK-NEXT: .size: 8
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; CHECK-NEXT: .value_type: i8
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; CHECK-NEXT: .address_space: global
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define amdgpu_kernel void @test_enqueue_kernel_caller(i8 %a) #0
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!kernel_arg_addr_space !1 !kernel_arg_access_qual !2 !kernel_arg_type !3
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!kernel_arg_base_type !3 !kernel_arg_type_qual !4 {
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ret void
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}
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; CHECK: amdhsa.version:
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; CHECK-NEXT: - 1
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; CHECK-NEXT: - 0
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; CHECK-NOT: amdhsa.printf:
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attributes #0 = { "calls-enqueue-kernel" }
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!1 = !{i32 0}
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!2 = !{!"none"}
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!3 = !{!"char"}
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!4 = !{!""}
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!opencl.ocl.version = !{!90}
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!90 = !{i32 2, i32 0}
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; PARSER: AMDGPU HSA Metadata Parser Test: PASS
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