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https://github.com/RPCS3/llvm-mirror.git
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cd4ff3e8fc
output As part of the unification of the debug format and the MIR format, always use `printReg` to print all kinds of registers. Updated the tests using '_' instead of '%noreg' until we decide which one we want to be the default one. Differential Revision: https://reviews.llvm.org/D40421 llvm-svn: 319445
51 lines
1.4 KiB
LLVM
51 lines
1.4 KiB
LLVM
; RUN: llc < %s -O1 -march=sparc | FileCheck %s -check-prefix=NO_ITIN
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; RUN: llc < %s -O1 -march=sparc -mcpu=leon2 | FileCheck %s -check-prefix=LEON2_ITIN
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; RUN: llc < %s -O1 -march=sparc -mcpu=leon3 | FileCheck %s -check-prefix=LEON3_4_ITIN
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; RUN: llc < %s -O1 -march=sparc -mcpu=leon4 | FileCheck %s -check-prefix=LEON3_4_ITIN
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; NO_ITIN-LABEL: f32_ops:
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; NO_ITIN: ld
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; NO_ITIN-NEXT: ld
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; NO_ITIN-NEXT: ld
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; NO_ITIN-NEXT: ld
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; NO_ITIN-NEXT: fadds
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; NO_ITIN-NEXT: fsubs
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; NO_ITIN-NEXT: fmuls
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; NO_ITIN-NEXT: retl
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; NO_ITIN-NEXT: fdivs
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; LEON2_ITIN-LABEL: f32_ops:
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; LEON2_ITIN: ld
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; LEON2_ITIN-NEXT: ld
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; LEON2_ITIN-NEXT: fadds
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; LEON2_ITIN-NEXT: ld
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; LEON2_ITIN-NEXT: fsubs
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; LEON2_ITIN-NEXT: ld
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; LEON2_ITIN-NEXT: fmuls
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; LEON2_ITIN-NEXT: retl
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; LEON2_ITIN-NEXT: fdivs
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; LEON3_4_ITIN-LABEL: f32_ops:
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; LEON3_4_ITIN: ld
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; LEON3_4_ITIN-NEXT: ld
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; LEON3_4_ITIN-NEXT: ld
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; LEON3_4_ITIN-NEXT: fadds
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; LEON3_4_ITIN-NEXT: ld
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; LEON3_4_ITIN-NEXT: fsubs
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; LEON3_4_ITIN-NEXT: fmuls
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; LEON3_4_ITIN-NEXT: retl
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; LEON3_4_ITIN-NEXT: fdivs
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define float @f32_ops(float* byval %a, float* byval %b, float* byval %c, float* byval %d) {
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entry:
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%0 = load float, float* %a, align 8
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%1 = load float, float* %b, align 8
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%2 = load float, float* %c, align 8
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%3 = load float, float* %d, align 8
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%4 = fadd float %0, %1
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%5 = fsub float %4, %2
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%6 = fmul float %5, %3
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%7 = fdiv float %6, %4
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ret float %7
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}
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