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3a6b5e0f17
Windows on ARM only supports thumb mode execution, so we have to explicitly pick some non-Windows OS to test ARM mode codegen. llvm-svn: 208638
43 lines
953 B
LLVM
43 lines
953 B
LLVM
; RUN: llc -mtriple=arm-darwin -mattr=v6 < %s | FileCheck %s
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; RUN: llc -mtriple=thumb-darwin -mattr=v6 < %s | FileCheck %s
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define void @test1(i16* nocapture %data) {
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entry:
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%0 = load i16* %data, align 2
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%1 = tail call i16 @llvm.bswap.i16(i16 %0)
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store i16 %1, i16* %data, align 2
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ret void
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; CHECK-LABEL: test1:
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; CHECK: ldrh r[[R1:[0-9]+]], [r0]
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; CHECK: rev16 r[[R1]], r[[R1]]
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; CHECK: strh r[[R1]], [r0]
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}
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define void @test2(i16* nocapture %data, i16 zeroext %in) {
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entry:
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%0 = tail call i16 @llvm.bswap.i16(i16 %in)
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store i16 %0, i16* %data, align 2
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ret void
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; CHECK-LABEL: test2:
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; CHECK: rev16 r[[R1:[0-9]+]], r1
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; CHECK: strh r[[R1]], [r0]
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}
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define i16 @test3(i16* nocapture %data) {
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entry:
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%0 = load i16* %data, align 2
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%1 = tail call i16 @llvm.bswap.i16(i16 %0)
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ret i16 %1
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; CHECK-LABEL: test3:
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; CHECK: ldrh r[[R0:[0-9]+]], [r0]
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; CHECK: rev16 r[[R0]], r0
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}
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declare i16 @llvm.bswap.i16(i16)
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